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Revisión94704e651324415039220956d904aa0bcf67dad8 (tree)
Tiempo2014-02-11 20:25:36
AutorYoshinori Sato <ysato@user...>
CommiterYoshinori Sato

Log Message

Add MS7206SE support.

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Diferencia incremental

--- /dev/null
+++ b/board/renesas/ms7206se/Makefile
@@ -0,0 +1,10 @@
1+#
2+# Copyright (C) 2013 Yoshinori Sato <ysato@users.sourceforge.jp>
3+#
4+# u-boot/board/renesas/ms7619se/Makefile
5+#
6+# SPDX-License-Identifier: GPL-2.0+
7+#
8+
9+obj-y := ms7206se.o
10+obj-y += lowlevel_init.o
--- /dev/null
+++ b/board/renesas/ms7206se/lowlevel_init.S
@@ -0,0 +1,124 @@
1+/*
2+ * Copyright (C) 2013 Yoshinori Sato <ysato@users.sourceforge.jp>
3+ *
4+ * SPDX-License-Identifier: GPL-2.0+
5+ */
6+
7+#include <config.h>
8+#include <version.h>
9+
10+#include <asm/processor.h>
11+#include <asm/macro.h>
12+#define INTMSK0 0x11800000
13+
14+ .global lowlevel_init
15+
16+ .text
17+ .align 2
18+
19+lowlevel_init:
20+ mova CPG_settings_table,r0
21+1: mov.l @r0+,r3 // Address (or zero)
22+ tst r3,r3
23+ bt 2f
24+ mov.l @r0+,r1 // data
25+ bra 1b
26+ mov.w r1,@r3
27+2:
28+ mov.l $mclkcr,r0 // MCLKCR setting
29+ mov #0x40,r1
30+ mov.b r1,@r0
31+
32+ // Set up the Bus Controler
33+ mova BSC_settings_table,r0
34+5: mov.l @r0+,r3 // Address (or zero)
35+ tst r3,r3
36+ bt 6f
37+ mov.l @r0+,r1 // data
38+ bra 5b
39+ mov.l r1,@r3
40+
41+6:
42+ mov.l $delay_count,r0
43+7:
44+ dt r0
45+ bf 7b
46+
47+ mov.l $SDMR,r1 // Turns on SDRAM controller
48+ mov.l $SDMR_val,r2
49+ mov.l r2,@r1
50+
51+ // Set up the Pin Function Controler
52+ mova PFC_settings_table,r0
53+3: mov.l @r0+,r3 // Address (or zero)
54+ tst r3,r3
55+ bt 4f
56+ mov.l @r0+,r1 // data
57+ bra 3b
58+ mov.w r1,@r3
59+4:
60+ rts/n
61+
62+ .align 4
63+$delay_count:
64+ .long 2000
65+$SDMR: .long 0xfffc5880
66+$SDMR_val:
67+ .long 0
68+
69+$mclkcr:
70+ .long MCLKCR
71+
72+CPG_settings_table:
73+ .long WTCSR,0xA500
74+ .long WTCNT,0x5A00
75+ .long WTCSR,0xA51E
76+ .long FRQCR, 0x120c /* input:33.3333MHz I:B:P=6:2:1=200MHz:66MHz:33MHz */
77+ .long 0
78+
79+BSC_settings_table:
80+ # Settings from Hitachi docs for SE7206
81+ .long CMNCR, 0x00001010
82+ .long CS0BCR, 0x10000600
83+ .long CS2BCR, 0x10000600
84+ .long CS4BCR, 0x10000400
85+ .long CS5BCR, 0x10000400
86+ .long CS3BCR, 0x10004600
87+ .long CS0WCR, 0x00000380; /* wait:4cycle */
88+ .long CS2WCR, 0x00000380;
89+ .long CS4WCR, 0x00000380;
90+ .long CS5WCR, 0x00000380;
91+ .long CS3WCR, 0x00004892; /* pre->actv:1cycle, actv->read/write:2cycle, write->pre:1cycle, ref->actv:4cycle */
92+ .long SDCR, 0x00000811;
93+ .long RTCNT, 0xa55a0083;
94+ .long RTCOR, 0xa55a0083;
95+ .long RTCSR, 0xa55a0008; /* reflesh count=Bφ/4 */
96+ .long 0
97+
98+PFC_settings_table:
99+ .long PACRH3, 0x0022
100+ .long PACRH2, 0x1111
101+ .long PACRH1, 0x1115
102+ .long PACRL4, 0x1111
103+ .long PACRL3, 0x1125
104+ .long PACRL2, 0x2255
105+ .long PACRL1, 0x5500
106+ .long PBCR3, 0x0022
107+ .long PBCR2, 0x2244
108+ .long PBCR1, 0x1111
109+ .long PCCRL1, 0x1111
110+ .long PDCRH4, 0x1111
111+ .long PDCRH3, 0x1111
112+ .long PDCRH2, 0x1111
113+ .long PDCRH1, 0x1111
114+ .long PDCRL4, 0x1111
115+ .long PDCRL3, 0x1111
116+ .long PECRH1, 0x0005
117+ .long PECRL4, 0x3223
118+ .long PECRL3, 0x3030
119+ .long PECRL2, 0x3550
120+ .long IFCR, 0x0003
121+ .long 0
122+
123+$INTMSK0:
124+ .long INTMSK0
--- /dev/null
+++ b/board/renesas/ms7206se/ms7206se.c
@@ -0,0 +1,43 @@
1+/*
2+ * Copyright (C) 2013 Yoshinori Sato <ysato@users.sourceforge.jp>
3+ *
4+ * SPDX-License-Identifier: GPL-2.0+
5+ */
6+
7+#include <common.h>
8+#include <net.h>
9+#include <netdev.h>
10+#include <asm/io.h>
11+#include <asm/processor.h>
12+
13+DECLARE_GLOBAL_DATA_PTR;
14+
15+int checkboard(void)
16+{
17+ puts("BOARD: Renesas Technology MS7206SE\n");
18+ return 0;
19+}
20+
21+int board_init(void)
22+{
23+ return 0;
24+}
25+
26+int dram_init(void)
27+{
28+ gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
29+ gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
30+ printf("DRAM: %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024));
31+ return 0;
32+}
33+
34+#ifdef CONFIG_CMD_NET
35+int board_eth_init(bd_t *bis)
36+{
37+ int rc = 0;
38+#ifdef CONFIG_SMC91111
39+ rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
40+#endif
41+ return rc;
42+}
43+#endif
--- a/boards.cfg
+++ b/boards.cfg
@@ -1203,6 +1203,7 @@ Active powerpc ppc4xx - xilinx ppc440-generic
12031203 Active powerpc ppc4xx - xilinx ppc440-generic xilinx-ppc440-generic_flash xilinx-ppc440-generic:SYS_TEXT_BASE=0xF7F60000,RESET_VECTOR_ADDRESS=0xF7FFFFFC Ricardo Ribalda <ricardo.ribalda@uam.es>
12041204 Active sandbox sandbox - sandbox sandbox sandbox - Simon Glass <sjg@chromium.org>
12051205 Active sh sh2 - renesas rsk7203 rsk7203 - Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>:Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
1206+Active sh sh2 - renesas ms7206se ms7206se - Yoshinori Sato <ysato@users.sourceforge.jp>
12061207 Active sh sh2 - renesas rsk7264 rsk7264 - Phil Edworthy <phil.edworthy@renesas.com>
12071208 Active sh sh2 - renesas rsk7269 rsk7269 - -
12081209 Active sh sh3 - - mpr2 mpr2 - Mark Jonas <mark.jonas@de.bosch.com>
--- a/drivers/net/smc91111.h
+++ b/drivers/net/smc91111.h
@@ -236,7 +236,36 @@ struct smc91111_priv{
236236 *(__b2 + __i) = SMC_inb((a),(r)); \
237237 }; \
238238 }while(0)
239-
239+#elif defined(CONFIG_MS7206SE)
240+#define SWAB(x) ({ word __x = x; ((__x << 8)|(__x >> 8));})
241+#define SMC_inw(a,r) *((volatile word *)((a)->iobase + (r)))
242+#define SMC_inb(a,r) (*((volatile byte *)((a)->iobase + ((r) ^ 0x01))))
243+#define SMC_insw(a,r,b,l) \
244+ do { \
245+ int __i; \
246+ word *__b2 = (word *)(b); \
247+ for (__i = 0; __i < (l); __i++) { \
248+ *__b2++ = SWAB(SMC_inw(a, r)); \
249+ } \
250+ } while(0);
251+#define SMC_outw(a,d,r) (*((volatile word *)((a)->iobase+(r))) = d)
252+#define SMC_outb(a,d,r) ({ word __d = (byte)(d); \
253+ word __w = SMC_inw((a),((r)&(~1))); \
254+ if(((r) & 1)) \
255+ __w = (__w & 0x00ff) | (__d << 8); \
256+ else \
257+ __w = (__w & 0xff00) | (__d); \
258+ SMC_outw((a),__w,((r)&(~1))); \
259+ })
260+#define SMC_outsw(a,r,b,l) \
261+ do { \
262+ int __i; \
263+ word *__b2 = (word *)(b); \
264+ for (__i = 0; __i < (l); __i++) { \
265+ SMC_outw(a, SWAB(*__b2), r); \
266+ __b2++; \
267+ } \
268+ } while(0);
240269 #else /* if not CONFIG_CPU_PXA25X and not CONFIG_LEON */
241270
242271 #ifndef CONFIG_SMC_USE_IOFUNCS /* these macros don't work on some boards */
--- /dev/null
+++ b/include/configs/ms7206se.h
@@ -0,0 +1,95 @@
1+/*
2+ * Configuation settings for the Renesas Technology MS7206SE
3+ *
4+ * Copyright (C) 2013 Yoshinori Sato <ysato@users.sourceforge.jp>
5+ *
6+ * SPDX-License-Identifier: GPL-2.0+
7+ */
8+
9+#ifndef __MS7206SE_H
10+#define __MS7206SE
11+
12+#undef DEBUG
13+#define CONFIG_SH 1
14+#define CONFIG_SH2 1
15+#define CONFIG_SH2A 1
16+#define CONFIG_CPU_SH7206 1
17+#define CONFIG_MS7206SE 1
18+
19+#define CONFIG_CMD_FLASH
20+#define CONFIG_CMD_NET
21+#define CONFIG_CMD_SAVEENV
22+#define CONFIG_CMD_SDRAM
23+#define CONFIG_CMD_MEMORY
24+#define CONFIG_CMD_MEMTEST
25+#define CONFIG_CMD_CACHE
26+
27+#define CONFIG_BAUDRATE 115200
28+#define CONFIG_BOOTARGS "console=ttySC3,115200"
29+#define CONFIG_LOADADDR 0x0C100000 /* MS7206SE01_SDRAM_BASE + 1MB */
30+
31+#define CONFIG_VERSION_VARIABLE
32+#undef CONFIG_SHOW_BOOT_PROGRESS
33+
34+/* MEMORY */
35+#define MS7206SE_SDRAM_BASE 0x0C000000
36+#define MS7206SE_FLASH_BASE_1 0x20000000 /* Non cache */
37+#define MS7206SE_FLASH_BANK_SIZE (16 * 1024 * 1024)
38+
39+#define CONFIG_SYS_TEXT_BASE 0x0C7C0000
40+#define CONFIG_SYS_LONGHELP /* undef to save memory */
41+#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
42+#define CONFIG_SYS_CBSIZE 256 /* Buffer size for input from the Console */
43+#define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */
44+#define CONFIG_SYS_MAXARGS 16 /* max args accepted for monitor commands */
45+/* Buffer size for Boot Arguments passed to kernel */
46+#define CONFIG_SYS_BARGSIZE 512
47+/* List of legal baudrate settings for this board */
48+#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 3840, 57600, 115200 }
49+
50+/* SCIF */
51+#define CONFIG_SCIF_CONSOLE 1
52+#define CONFIG_CONS_SCIF3 1
53+
54+#define CONFIG_SYS_MEMTEST_START CONFIG_LOADADDR
55+#define CONFIG_SYS_MEMTEST_END (CONFIG_LOADADDR + (63 * 1024 * 1024))
56+
57+#define CONFIG_SYS_SDRAM_BASE MS7206SE_SDRAM_BASE
58+#define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024)
59+
60+#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 1024 * 1024)
61+#define CONFIG_SYS_MONITOR_BASE MS7206SE_FLASH_BASE_1
62+#define CONFIG_SYS_MONITOR_LEN (128 * 1024)
63+#define CONFIG_SYS_MALLOC_LEN (256 * 1024)
64+#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
65+
66+/* FLASH */
67+#define CONFIG_FLASH_CFI_DRIVER
68+#define CONFIG_SYS_FLASH_CFI
69+#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
70+#undef CONFIG_SYS_FLASH_QUIET_TEST
71+#define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
72+#define CONFIG_SYS_FLASH_BASE MS7206SE_FLASH_BASE_1
73+#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
74+#define CONFIG_SYS_MAX_FLASH_SECT 142
75+#define CONFIG_SYS_MAX_FLASH_BANKS 1
76+
77+#define CONFIG_ENV_IS_IN_FLASH
78+#define CONFIG_ENV_SECT_SIZE (128 * 1024)
79+#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
80+#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
81+#define CONFIG_SYS_FLASH_ERASE_TOUT 12000
82+#define CONFIG_SYS_FLASH_WRITE_TOUT 500
83+
84+/* Board Clock */
85+#define CONFIG_SYS_CLK_FREQ 33333333
86+#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
87+#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
88+#define CMT_CLK_DIVIDER 32 /* 8 (default), 32, 128 or 512 */
89+#define CONFIG_SH_CMT_CLK_FREQ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER)
90+
91+/* Network interface */
92+#define CONFIG_SMC91111
93+#define CONFIG_SMC91111_BASE (0x30000000)
94+
95+#endif /* __MS7206SE_H */