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Revisiónfeaf8e0cf03ef030ed7ebd6db2fa7a1ad3be25d0 (tree)
Tiempo2022-07-26 18:29:01
AutorPeng Fan <peng.fan@nxp....>
CommiterStefano Babic

Log Message

imx: imx93_evk: Set ARM clock to 1.7Ghz

Set ARM clock to OD frequency 1.7Ghz, since we have set PMIC VDD_SOC
to Overdrive voltage 0.9V

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>

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Diferencia incremental

--- a/arch/arm/include/asm/arch-imx9/clock.h
+++ b/arch/arm/include/asm/arch-imx9/clock.h
@@ -217,6 +217,8 @@ void dram_pll_init(ulong pll_val);
217217 void dram_enable_bypass(ulong clk_val);
218218 void dram_disable_bypass(void);
219219
220+int configure_intpll(enum ccm_clk_src pll, u32 freq);
221+
220222 int ccm_clk_src_on(enum ccm_clk_src oscpll, bool enable);
221223 int ccm_clk_src_auto(enum ccm_clk_src oscpll, bool enable);
222224 int ccm_clk_src_lpm(enum ccm_clk_src oscpll, bool enable);
@@ -238,5 +240,5 @@ int ccm_shared_gpr_tz_access(u32 gpr, bool non_secure, bool user_mode, bool lock
238240 void enable_usboh3_clk(unsigned char enable);
239241 int set_clk_enet(enum enet_freq type);
240242 int set_clk_eqos(enum enet_freq type);
241-
243+void set_arm_clk(ulong freq);
242244 #endif
--- a/arch/arm/mach-imx/imx9/clock.c
+++ b/arch/arm/mach-imx/imx9/clock.c
@@ -665,6 +665,15 @@ void dram_disable_bypass(void)
665665 /* Switch from DRAM clock root from CCM to PLL */
666666 ccm_shared_gpr_set(SHARED_GPR_DRAM_CLK, SHARED_GPR_DRAM_CLK_SEL_PLL);
667667 }
668+
669+void set_arm_clk(ulong freq)
670+{
671+ /* Increase ARM clock to 1.7Ghz */
672+ ccm_shared_gpr_set(SHARED_GPR_A55_CLK, SHARED_GPR_A55_CLK_SEL_CCM);
673+ configure_intpll(ARM_PLL_CLK, 1700000000);
674+ ccm_shared_gpr_set(SHARED_GPR_A55_CLK, SHARED_GPR_A55_CLK_SEL_PLL);
675+}
676+
668677 #endif
669678
670679 int clock_init(void)
--- a/board/freescale/imx93_evk/spl.c
+++ b/board/freescale/imx93_evk/spl.c
@@ -108,6 +108,9 @@ void board_init_f(ulong dummy)
108108 }
109109 power_init_board();
110110
111+ /* 1.7GHz */
112+ set_arm_clk(1700000000);
113+
111114 /* Init power of mix */
112115 soc_power_init();
113116