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hardware/intel/intel-driver


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Revisióne4612c31f70c73e817be64192e7855c88f8ff8c4 (tree)
Tiempo2014-12-14 01:42:16
AutorXiang, Haihao <haihao.xiang@inte...>
CommiterXiang, Haihao

Log Message

Fix SKL media pipeline for VPP

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit 2433a174971266c092b8db59943557e000dcbb4e)

Conflicts:

src/gen8_post_processing.c

Cambiar Resumen

Diferencia incremental

--- a/src/gen8_post_processing.c
+++ b/src/gen8_post_processing.c
@@ -1006,7 +1006,7 @@ gen8_pp_plx_avs_initialize(VADriverContextP ctx, struct i965_post_processing_con
10061006 return VA_STATUS_SUCCESS;
10071007 }
10081008
1009-static VAStatus
1009+VAStatus
10101010 gen8_pp_initialize(
10111011 VADriverContextP ctx,
10121012 struct i965_post_processing_context *pp_context,
@@ -1151,7 +1151,7 @@ gen8_pp_upload_constants(VADriverContextP ctx,
11511151 return;
11521152 }
11531153
1154-static void
1154+void
11551155 gen8_pp_states_setup(VADriverContextP ctx,
11561156 struct i965_post_processing_context *pp_context)
11571157 {
@@ -1205,7 +1205,7 @@ gen8_pp_state_base_address(VADriverContextP ctx,
12051205 ADVANCE_BATCH(batch);
12061206 }
12071207
1208-static void
1208+void
12091209 gen8_pp_vfe_state(VADriverContextP ctx,
12101210 struct i965_post_processing_context *pp_context)
12111211 {
@@ -1230,7 +1230,7 @@ gen8_pp_vfe_state(VADriverContextP ctx,
12301230 ADVANCE_BATCH(batch);
12311231 }
12321232
1233-static void
1233+void
12341234 gen8_interface_descriptor_load(VADriverContextP ctx,
12351235 struct i965_post_processing_context *pp_context)
12361236 {
@@ -1249,7 +1249,7 @@ gen8_interface_descriptor_load(VADriverContextP ctx,
12491249 ADVANCE_BATCH(batch);
12501250 }
12511251
1252-static void
1252+void
12531253 gen8_pp_curbe_load(VADriverContextP ctx,
12541254 struct i965_post_processing_context *pp_context)
12551255 {
@@ -1268,7 +1268,7 @@ gen8_pp_curbe_load(VADriverContextP ctx,
12681268 ADVANCE_BATCH(batch);
12691269 }
12701270
1271-static void
1271+void
12721272 gen8_pp_object_walker(VADriverContextP ctx,
12731273 struct i965_post_processing_context *pp_context)
12741274 {
--- a/src/gen8_post_processing.h
+++ b/src/gen8_post_processing.h
@@ -50,6 +50,36 @@ gen8_pp_nv12_blending_initialize(VADriverContextP ctx, struct i965_post_processi
5050 void *filter_param);
5151
5252 void
53+gen8_pp_vfe_state(VADriverContextP ctx,
54+ struct i965_post_processing_context *pp_context);
55+
56+void
57+gen8_interface_descriptor_load(VADriverContextP ctx,
58+ struct i965_post_processing_context *pp_context);
59+
60+void
61+gen8_pp_curbe_load(VADriverContextP ctx,
62+ struct i965_post_processing_context *pp_context);
63+
64+void
65+gen8_pp_object_walker(VADriverContextP ctx,
66+ struct i965_post_processing_context *pp_context);
67+
68+void
69+gen8_pp_states_setup(VADriverContextP ctx,
70+ struct i965_post_processing_context *pp_context);
71+
72+VAStatus
73+gen8_pp_initialize(VADriverContextP ctx,
74+ struct i965_post_processing_context *pp_context,
75+ const struct i965_surface *src_surface,
76+ const VARectangle *src_rect,
77+ struct i965_surface *dst_surface,
78+ const VARectangle *dst_rect,
79+ int pp_index,
80+ void *filter_param);
81+
82+void
5383 gen8_post_processing_context_common_init(VADriverContextP ctx,
5484 void *data,
5585 struct pp_module *pp_modules,
--- a/src/gen9_post_processing.c
+++ b/src/gen9_post_processing.c
@@ -295,10 +295,137 @@ static struct pp_module pp_modules_gen9[] = {
295295 },
296296 };
297297
298+static void
299+gen9_pp_pipeline_select(VADriverContextP ctx,
300+ struct i965_post_processing_context *pp_context)
301+{
302+ struct intel_batchbuffer *batch = pp_context->batch;
303+
304+ BEGIN_BATCH(batch, 1);
305+ OUT_BATCH(batch,
306+ CMD_PIPELINE_SELECT |
307+ PIPELINE_SELECT_MEDIA |
308+ GEN9_FORCE_MEDIA_AWAKE_ON |
309+ GEN9_MEDIA_DOP_GATE_OFF |
310+ GEN9_PIPELINE_SELECTION_MASK |
311+ GEN9_MEDIA_DOP_GATE_MASK |
312+ GEN9_FORCE_MEDIA_AWAKE_MASK);
313+ ADVANCE_BATCH(batch);
314+}
315+
316+static void
317+gen9_pp_state_base_address(VADriverContextP ctx,
318+ struct i965_post_processing_context *pp_context)
319+{
320+ struct intel_batchbuffer *batch = pp_context->batch;
321+
322+ BEGIN_BATCH(batch, 19);
323+ OUT_BATCH(batch, CMD_STATE_BASE_ADDRESS | (19 - 2));
324+ /* DW1 Generate state address */
325+ OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY);
326+ OUT_BATCH(batch, 0);
327+ OUT_BATCH(batch, 0);
328+ /* DW4. Surface state address */
329+ OUT_RELOC(batch, pp_context->surface_state_binding_table.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); /* Surface state base address */
330+ OUT_BATCH(batch, 0);
331+ /* DW6. Dynamic state address */
332+ OUT_RELOC(batch, pp_context->dynamic_state.bo, I915_GEM_DOMAIN_RENDER | I915_GEM_DOMAIN_SAMPLER,
333+ 0, 0 | BASE_ADDRESS_MODIFY);
334+ OUT_BATCH(batch, 0);
335+
336+ /* DW8. Indirect object address */
337+ OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY);
338+ OUT_BATCH(batch, 0);
339+
340+ /* DW10. Instruction base address */
341+ OUT_RELOC(batch, pp_context->instruction_state.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY);
342+ OUT_BATCH(batch, 0);
343+
344+ OUT_BATCH(batch, 0xFFFF0000 | BASE_ADDRESS_MODIFY);
345+ OUT_BATCH(batch, 0xFFFF0000 | BASE_ADDRESS_MODIFY);
346+ OUT_BATCH(batch, 0xFFFF0000 | BASE_ADDRESS_MODIFY);
347+ OUT_BATCH(batch, 0xFFFF0000 | BASE_ADDRESS_MODIFY);
348+
349+ /* Bindless surface state base address */
350+ OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY);
351+ OUT_BATCH(batch, 0);
352+ OUT_BATCH(batch, 0xfffff000);
353+
354+ ADVANCE_BATCH(batch);
355+}
356+
357+static void
358+gen9_pp_end_pipeline(VADriverContextP ctx,
359+ struct i965_post_processing_context *pp_context)
360+{
361+ struct intel_batchbuffer *batch = pp_context->batch;
362+
363+ BEGIN_BATCH(batch, 1);
364+ OUT_BATCH(batch,
365+ CMD_PIPELINE_SELECT |
366+ PIPELINE_SELECT_MEDIA |
367+ GEN9_FORCE_MEDIA_AWAKE_OFF |
368+ GEN9_MEDIA_DOP_GATE_ON |
369+ GEN9_PIPELINE_SELECTION_MASK |
370+ GEN9_MEDIA_DOP_GATE_MASK |
371+ GEN9_FORCE_MEDIA_AWAKE_MASK);
372+ ADVANCE_BATCH(batch);
373+}
374+
375+static void
376+gen9_pp_pipeline_setup(VADriverContextP ctx,
377+ struct i965_post_processing_context *pp_context)
378+{
379+ struct intel_batchbuffer *batch = pp_context->batch;
380+
381+ intel_batchbuffer_start_atomic(batch, 0x1000);
382+ intel_batchbuffer_emit_mi_flush(batch);
383+ gen9_pp_pipeline_select(ctx, pp_context);
384+ gen9_pp_state_base_address(ctx, pp_context);
385+ gen8_pp_vfe_state(ctx, pp_context);
386+ gen8_pp_curbe_load(ctx, pp_context);
387+ gen8_interface_descriptor_load(ctx, pp_context);
388+ gen8_pp_object_walker(ctx, pp_context);
389+ gen9_pp_end_pipeline(ctx, pp_context);
390+ intel_batchbuffer_end_atomic(batch);
391+}
392+
393+static VAStatus
394+gen9_post_processing(VADriverContextP ctx,
395+ struct i965_post_processing_context *pp_context,
396+ const struct i965_surface *src_surface,
397+ const VARectangle *src_rect,
398+ struct i965_surface *dst_surface,
399+ const VARectangle *dst_rect,
400+ int pp_index,
401+ void * filter_param)
402+{
403+ VAStatus va_status;
404+
405+ va_status = gen8_pp_initialize(ctx, pp_context,
406+ src_surface,
407+ src_rect,
408+ dst_surface,
409+ dst_rect,
410+ pp_index,
411+ filter_param);
412+
413+ if (va_status == VA_STATUS_SUCCESS) {
414+ gen8_pp_states_setup(ctx, pp_context);
415+ gen9_pp_pipeline_setup(ctx, pp_context);
416+ }
417+
418+ return va_status;
419+}
420+
298421 void
299422 gen9_post_processing_context_init(VADriverContextP ctx,
300423 void *data,
301424 struct intel_batchbuffer *batch)
302425 {
426+ struct i965_post_processing_context *pp_context = data;
427+
303428 gen8_post_processing_context_common_init(ctx, data, pp_modules_gen9, ARRAY_ELEMS(pp_modules_gen9), batch);
429+
430+ pp_context->intel_post_processing = gen9_post_processing;
304431 }