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hardware/intel/intel-driver


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Revisióne889cefebad2a2fa2230882b8070309f23054247 (tree)
Tiempo2014-05-26 12:59:24
AutorXiang, Haihao <haihao.xiang@inte...>
CommiterXiang, Haihao

Log Message

Remove max_wm_threads from render_state

Instead directly use the value stored in intel_device_info

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit 6ba787b29e4bcebdceda52906e33cb84f24a63b5)

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Diferencia incremental

--- a/src/gen8_render.c
+++ b/src/gen8_render.c
@@ -1377,7 +1377,7 @@ gen8_emit_wm_state(VADriverContextP ctx, int kernel)
13771377 unsigned int num_samples = 0;
13781378 unsigned int max_threads;
13791379
1380- max_threads = render_state->max_wm_threads - 2;
1380+ max_threads = i965->intel.device_info->max_wm_threads - 2;
13811381
13821382 BEGIN_BATCH(batch, 2);
13831383 OUT_BATCH(batch, GEN8_3DSTATE_PSEXTRA | (2 - 2));
@@ -1784,14 +1784,6 @@ gen8_render_init(VADriverContextP ctx)
17841784
17851785 dri_bo_unmap(render_state->instruction_state.bo);
17861786
1787-
1788- if (IS_GEN8(i965->intel.device_id)) {
1789- render_state->max_wm_threads = 64;
1790- } else {
1791- /* should never get here !!! */
1792- assert(0);
1793- }
1794-
17951787 return true;
17961788 }
17971789
--- a/src/i965_render.c
+++ b/src/i965_render.c
@@ -478,7 +478,7 @@ i965_subpic_render_wm_unit(VADriverContextP ctx)
478478 wm_state->wm4.sampler_count = (render_state->wm.sampler_count + 3) / 4;
479479 }
480480
481- wm_state->wm5.max_threads = render_state->max_wm_threads - 1;
481+ wm_state->wm5.max_threads = i965->intel.device_info->max_wm_threads - 1;
482482 wm_state->wm5.thread_dispatch_enable = 1;
483483 wm_state->wm5.enable_16_pix = 1;
484484 wm_state->wm5.enable_8_pix = 0;
@@ -542,7 +542,7 @@ i965_render_wm_unit(VADriverContextP ctx)
542542 wm_state->wm4.sampler_count = (render_state->wm.sampler_count + 3) / 4;
543543 }
544544
545- wm_state->wm5.max_threads = render_state->max_wm_threads - 1;
545+ wm_state->wm5.max_threads = i965->intel.device_info->max_wm_threads - 1;
546546 wm_state->wm5.thread_dispatch_enable = 1;
547547 wm_state->wm5.enable_16_pix = 1;
548548 wm_state->wm5.enable_8_pix = 0;
@@ -2117,7 +2117,7 @@ gen6_emit_wm_state(VADriverContextP ctx, int kernel)
21172117 (5 << GEN6_3DSTATE_WM_BINDING_TABLE_ENTRY_COUNT_SHIFT));
21182118 OUT_BATCH(batch, 0);
21192119 OUT_BATCH(batch, (6 << GEN6_3DSTATE_WM_DISPATCH_START_GRF_0_SHIFT)); /* DW4 */
2120- OUT_BATCH(batch, ((render_state->max_wm_threads - 1) << GEN6_3DSTATE_WM_MAX_THREADS_SHIFT) |
2120+ OUT_BATCH(batch, ((i965->intel.device_info->max_wm_threads - 1) << GEN6_3DSTATE_WM_MAX_THREADS_SHIFT) |
21212121 GEN6_3DSTATE_WM_DISPATCH_ENABLE |
21222122 GEN6_3DSTATE_WM_16_DISPATCH_ENABLE);
21232123 OUT_BATCH(batch, (1 << GEN6_3DSTATE_WM_NUM_SF_OUTPUTS_SHIFT) |
@@ -2899,7 +2899,7 @@ gen7_emit_wm_state(VADriverContextP ctx, int kernel)
28992899 (5 << GEN7_PS_BINDING_TABLE_ENTRY_COUNT_SHIFT));
29002900 OUT_BATCH(batch, 0); /* scratch space base offset */
29012901 OUT_BATCH(batch,
2902- ((render_state->max_wm_threads - 1) << max_threads_shift) | num_samples |
2902+ ((i965->intel.device_info->max_wm_threads - 1) << max_threads_shift) | num_samples |
29032903 GEN7_PS_PUSH_CONSTANT_ENABLE |
29042904 GEN7_PS_ATTRIBUTE_ENABLE |
29052905 GEN7_PS_16_DISPATCH_ENABLE);
@@ -3187,29 +3187,6 @@ i965_render_init(VADriverContextP ctx)
31873187 4096, 64);
31883188 assert(render_state->curbe.bo);
31893189
3190- if (IS_HSW_GT1(i965->intel.device_id)) {
3191- render_state->max_wm_threads = 102;
3192- } else if (IS_HSW_GT2(i965->intel.device_id)) {
3193- render_state->max_wm_threads = 204;
3194- } else if (IS_HSW_GT3(i965->intel.device_id)) {
3195- render_state->max_wm_threads = 408;
3196- } else if (IS_IVB_GT1(i965->intel.device_id) || IS_BAYTRAIL(i965->intel.device_id)) {
3197- render_state->max_wm_threads = 48;
3198- } else if (IS_IVB_GT2(i965->intel.device_id)) {
3199- render_state->max_wm_threads = 172;
3200- } else if (IS_SNB_GT1(i965->intel.device_id)) {
3201- render_state->max_wm_threads = 40;
3202- } else if (IS_SNB_GT2(i965->intel.device_id)) {
3203- render_state->max_wm_threads = 80;
3204- } else if (IS_IRONLAKE(i965->intel.device_id)) {
3205- render_state->max_wm_threads = 72; /* 12 * 6 */
3206- } else if (IS_G4X(i965->intel.device_id)) {
3207- render_state->max_wm_threads = 50; /* 12 * 5 */
3208- } else {
3209- /* should never get here !!! */
3210- assert(0);
3211- }
3212-
32133190 return true;
32143191 }
32153192
--- a/src/i965_render.h
+++ b/src/i965_render.h
@@ -79,8 +79,6 @@ struct i965_render_state
7979
8080 struct i965_kernel render_kernels[3];
8181
82- int max_wm_threads;
83-
8482 struct {
8583 dri_bo *bo;
8684 int bo_size;