Mercurial Patch Queue for Windows System Libraries
Revisión | 68fa70d72cc194805aa9994a9e460ce2f29190c0 (tree) |
---|---|
Tiempo | 2019-04-24 22:08:07 |
Autor | Keith Marshall <keith@user...> |
Commiter | Keith Marshall |
Fix Win64 leading underscore discrepancy; add winnt-page-targets.
@@ -1,5 +1,5 @@ | ||
1 | 1 | # HG changeset patch |
2 | -# Parent 66b461070c4b063621a1af46c9fbf17323ce536a | |
2 | +# Parent 1b41be1ec331fc92b2a421a63f69b963bd4b39e1 | |
3 | 3 | # Parent d1de6110347aee4b3c939b68fcc9de1087c5e9c3 |
4 | 4 | Make CPU features initialization code x86-64 compliant. |
5 | 5 |
@@ -17,7 +17,22 @@ | ||
17 | 17 | diff --git a/mingwrt/cpu_features.sx b/mingwrt/cpu_features.sx |
18 | 18 | --- a/mingwrt/cpu_features.sx |
19 | 19 | +++ b/mingwrt/cpu_features.sx |
20 | -@@ -42,8 +42,33 @@ | |
20 | +@@ -3,11 +3,11 @@ | |
21 | + * Initialization procedure for identification of CPU supported features. | |
22 | + * | |
23 | + * $Id$ | |
24 | + * | |
25 | + * Written by Keith Marshall <keith@users.osdn.me> | |
26 | +- * Copyright (C) 2017, MinGW.org Project | |
27 | ++ * Copyright (C) 2017, 2019, MinGW.org Project | |
28 | + * | |
29 | + * Adapted from an original C language implementation. | |
30 | + * Written by Danny Smith <dannysmith@users.sourceforge.net> | |
31 | + * Copyright (C) 2006, 2008, 2009, MinGW.org Project | |
32 | + * | |
33 | +@@ -40,12 +40,45 @@ | |
34 | + #define RH_FLAG(BITNUM) (1 << ((BITNUM) - 8)) | |
35 | + | |
21 | 36 | #define CPUID_FLAG RX_FLAG(21) /* EFLAGS bit 21 */ |
22 | 37 | |
23 | 38 | #define FXSAVE_BUFSIZ 512 |
@@ -48,12 +63,39 @@ | ||
48 | 63 | +#define rbx ebx |
49 | 64 | +#define rsp esp |
50 | 65 | + |
66 | ++/* Finally, we need to recognize that the _WIN32 compiler prepends an | |
67 | ++ * additional underscore to public symbol names; once again, we adopt | |
68 | ++ * the _WIN64 convention, (which does NOT do this), and adjust public | |
69 | ++ * symbol names accordingly for the 32-bit case. | |
70 | ++ */ | |
71 | ++#define __cpu_features_init ___cpu_features_init | |
72 | ++#define __cpu_features ___cpu_features | |
73 | ++ | |
51 | 74 | +#endif /* !__x86_64__ */ |
52 | 75 | |
53 | 76 | /* FIXME: is this optimization really worthwhile here? It breaks, |
54 | 77 | * with older GAS versions, (such as that commonly deployed in the |
55 | -@@ -72,7 +97,11 @@ | |
56 | - ___cpu_features_init: | |
78 | + * GCC-3.4.5 era, and earlier)! | |
79 | + * | |
80 | +@@ -60,21 +93,25 @@ | |
81 | + * overhead to decode the "nop" instruction). | |
82 | + */ | |
83 | + #define ret repz ret | |
84 | + | |
85 | + .bss | |
86 | +-.globl ___cpu_features; .align 4 | |
87 | +-___cpu_features: .space 4 | |
88 | ++.globl __cpu_features; .align 4 | |
89 | ++__cpu_features: .space 4 | |
90 | + | |
91 | + .text | |
92 | +-.globl ___cpu_features_init; .p2align 4,,15 | |
93 | +-.def ___cpu_features_init; .scl 2; .type 32; .endef | |
94 | ++.globl __cpu_features_init; .p2align 4,,15 | |
95 | ++.def __cpu_features_init; .scl 2; .type 32; .endef | |
96 | + | |
97 | +-___cpu_features_init: | |
98 | ++__cpu_features_init: | |
57 | 99 | |
58 | 100 | .cfi_startproc |
59 | 101 | -/* Initialization requires use of the CPUID instruction; to check if it is |
@@ -65,7 +107,11 @@ | ||
65 | 107 | * supported by the host CPU, we try to toggle the CPUID flag bit within the |
66 | 108 | * EFLAGS register, (ultimately leaving it unchanged). |
67 | 109 | */ |
68 | -@@ -97,14 +126,16 @@ | |
110 | + pushf /* save original flags state */ | |
111 | + pushf /* duplicate them in both... */ | |
112 | +@@ -95,18 +132,20 @@ | |
113 | + */ | |
114 | + xor eax, edx /* isolate CPUID_FLAG state */ | |
69 | 115 | test eax, CPUID_FLAG /* did it change? */ |
70 | 116 | je 90f /* no: quit immediately */ |
71 | 117 |
@@ -85,7 +131,24 @@ | ||
85 | 131 | |
86 | 132 | /* First, we must perform a level zero CPUID enquiry, to determine the |
87 | 133 | * maximum level of interrogation which is supported. |
88 | -@@ -170,44 +201,44 @@ | |
134 | + */ | |
135 | + xor eax, eax /* zero request level code */ | |
136 | +@@ -119,11 +158,11 @@ | |
137 | + */ | |
138 | + mov eax, 1 /* select level one enquiry */ | |
139 | + cpuid /* get level one response */ | |
140 | + | |
141 | + /* Evaluate CPU capabilities (available features), accumulating flags for | |
142 | +- * each in EAX, for eventual update of the global ___cpu_features variable. | |
143 | ++ * each in EAX, for eventual update of the global __cpu_features variable. | |
144 | + */ | |
145 | + xor eax, eax /* start with a clean slate */ | |
146 | + | |
147 | + /* The CPUID level one features, in which we are interested, are reported | |
148 | + * in the ECX and EDX registers, using the following single bit flags for | |
149 | +@@ -168,48 +207,48 @@ 15: | |
150 | + /* We must create a local stack frame, with the stack pointer aligned to a | |
151 | + * sixteen byte boundary, in which to allocate an FXSAVE buffer; (failure to | |
89 | 152 | * align this correctly will raise an unhandled exception, and GCC cannot be |
90 | 153 | * trusted to get this right in C language code). |
91 | 154 | */ |
@@ -147,7 +210,29 @@ | ||
147 | 210 | |
148 | 211 | cmp ebx, FXTEST_BITS /* SSE flags were changed? */ |
149 | 212 | jne 20f /* no: skip SSE detection */ |
150 | -@@ -270,10 +301,10 @@ | |
213 | + | |
214 | + /* If we're still here, then the operating system should support SSE; | |
215 | +@@ -220,11 +259,11 @@ 15: | |
216 | + chk CPUID_CAP(SSE3) | |
217 | + | |
218 | + /* Before we move on to extended feature tests, we must store the feature | |
219 | + * test flags which we have accumulated so far... | |
220 | + */ | |
221 | +-20: mov DWORD PTR ___cpu_features, eax | |
222 | ++20: mov DWORD PTR __cpu_features, eax | |
223 | + | |
224 | + /* ...so that EAX becomes available for us to, first confirm that extended | |
225 | + * feature tests are supported... | |
226 | + */ | |
227 | + mov eax, 0x80000000 /* select extended features */ | |
228 | +@@ -264,18 +303,18 @@ 20: mov DWORD PTR ___cpu_features, eax | |
229 | + 30: chk CPUID_CAP(3DNOWP) | |
230 | + | |
231 | + /* Finally, we combine the extended feature test flags with those which we | |
232 | + * had previously accumulated from the regular feature tests, before... | |
233 | + */ | |
234 | +- or DWORD PTR ___cpu_features, eax | |
235 | ++ or DWORD PTR __cpu_features, eax | |
151 | 236 | |
152 | 237 | /* ...we restore the preserved state of the EBX register... |
153 | 238 | */ |
@@ -161,3 +246,5 @@ | ||
161 | 246 | |
162 | 247 | /* ...and return to the C runtime initialization procedure. |
163 | 248 | */ |
249 | + 90: ret | |
250 | + |
@@ -1,10 +1,11 @@ | ||
1 | +cpu-features-x86-64.patch #+win64 | |
1 | 2 | win64-context.patch #+win64 |
2 | 3 | winnt-decl-64.patch #+win64 |
3 | -cpu-features-x86-64.patch #+win64 | |
4 | 4 | win64-time-typedef.patch #+win64 |
5 | 5 | alloca-testing.patch #+void #-void |
6 | 6 | winerror-winsock2-update.patch #+void #-void |
7 | 7 | winnls-self-contained.patch #+self-contained |
8 | +winnt-page-targets.patch | |
8 | 9 | winnls-layout-improvement.patch |
9 | 10 | winnls-reorganization.patch |
10 | 11 | win10-version-identification.patch |
@@ -0,0 +1,31 @@ | ||
1 | +# HG changeset patch | |
2 | +# Parent b475633dd46d77bfdbfeac3264dfbbda57124610 | |
3 | +diff --git a/w32api/include/winnt.h b/w32api/include/winnt.h | |
4 | +--- a/w32api/include/winnt.h | |
5 | ++++ b/w32api/include/winnt.h | |
6 | +@@ -4,11 +4,11 @@ | |
7 | + * Win32-API macros and definitions originating from the WinNT product line. | |
8 | + * | |
9 | + * $Id$ | |
10 | + * | |
11 | + * Written by Anders Norlander <anorland@hem2.passagen.se> | |
12 | +- * Copyright (C) 1998-2011, 2016, 2017, MinGW.org Project | |
13 | ++ * Copyright (C) 1998-2011, 2016, 2017, 2019, MinGW.org Project | |
14 | + * | |
15 | + * | |
16 | + * Permission is hereby granted, free of charge, to any person obtaining a | |
17 | + * copy of this software and associated documentation files (the "Software"), | |
18 | + * to deal in the Software without restriction, including without limitation | |
19 | +@@ -1046,10 +1046,12 @@ typedef DWORD FLONG; | |
20 | + #define PAGE_WRITECOPY 0x0008 | |
21 | + #define PAGE_EXECUTE 0x0010 | |
22 | + #define PAGE_EXECUTE_READ 0x0020 | |
23 | + #define PAGE_EXECUTE_READWRITE 0x0040 | |
24 | + #define PAGE_EXECUTE_WRITECOPY 0x0080 | |
25 | ++#define PAGE_TARGETS_INVALID 0x40000000 | |
26 | ++#define PAGE_TARGETS_NO_UPDATE 0x40000000 | |
27 | + #define PAGE_GUARD 0x0100 | |
28 | + #define PAGE_NOCACHE 0x0200 | |
29 | + #define PAGE_WRITECOMBINE 0x0400 | |
30 | + #define MEM_COMMIT 0x1000 | |
31 | + #define MEM_RESERVE 0x2000 |