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hardware/intel/common/vaapi


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Revisión6702b01ee3598017f05374bfc7956493f790361c (tree)
Tiempo2017-07-28 13:52:07
Autorcarpalis <30320745+carpalis@user...>
CommiterXiang, Haihao

Log Message

implement intensity compensation for VC-1 decoding

Intensity compensation was not present for B-frames, but only for P-frames. When a P-frame flags intensity compensation for its forward reference frame, all subsequent B-frames that use this reference frame as well, need to do intensity compensation as well.

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Diferencia incremental

--- a/src/gen75_mfd.c
+++ b/src/gen75_mfd.c
@@ -1518,6 +1518,9 @@ gen75_mfd_init_vc1_surface(VADriverContextP ctx,
15181518 }
15191519
15201520 gen7_vc1_surface->picture_type = pic_param->picture_fields.bits.picture_type;
1521+ gen7_vc1_surface->intensity_compensation = 0;
1522+ gen7_vc1_surface->luma_scale = 0;
1523+ gen7_vc1_surface->luma_shift = 0;
15211524
15221525 if (gen7_vc1_surface->dmv == NULL) {
15231526 gen7_vc1_surface->dmv = dri_bo_alloc(i965->intel.bufmgr,
@@ -1538,17 +1541,33 @@ gen75_mfd_vc1_decode_init(VADriverContextP ctx,
15381541 dri_bo *bo;
15391542 int width_in_mbs;
15401543 int picture_type;
1544+ int intensity_compensation;
15411545
15421546 assert(decode_state->pic_param && decode_state->pic_param->buffer);
15431547 pic_param = (VAPictureParameterBufferVC1 *)decode_state->pic_param->buffer;
15441548 width_in_mbs = ALIGN(pic_param->coded_width, 16) / 16;
15451549 picture_type = pic_param->picture_fields.bits.picture_type;
1550+ intensity_compensation = (pic_param->mv_fields.bits.mv_mode == VAMvModeIntensityCompensation);
15461551
15471552 intel_update_vc1_frame_store_index(ctx,
15481553 decode_state,
15491554 pic_param,
15501555 gen7_mfd_context->reference_surface);
15511556
1557+ /* Forward reference picture */
1558+ obj_surface = decode_state->reference_objects[0];
1559+ if (pic_param->forward_reference_picture != VA_INVALID_ID &&
1560+ obj_surface &&
1561+ obj_surface->private_data) {
1562+ if (picture_type == 1 && intensity_compensation) { /* P picture */
1563+ struct gen7_vc1_surface *gen7_vc1_surface = obj_surface->private_data;
1564+
1565+ gen7_vc1_surface->intensity_compensation = intensity_compensation;
1566+ gen7_vc1_surface->luma_scale = pic_param->luma_scale;
1567+ gen7_vc1_surface->luma_shift = pic_param->luma_shift;
1568+ }
1569+ }
1570+
15521571 /* Current decoded picture */
15531572 obj_surface = decode_state->render_object;
15541573 i965_check_alloc_surface_bo(ctx, obj_surface, 1, VA_FOURCC_NV12, SUBSAMPLE_YUV420);
@@ -1915,24 +1934,37 @@ gen75_mfd_vc1_pred_pipe_state(VADriverContextP ctx,
19151934 {
19161935 struct intel_batchbuffer *batch = gen7_mfd_context->base.batch;
19171936 VAPictureParameterBufferVC1 *pic_param;
1918- int intensitycomp_single;
1937+ int picture_type;
1938+ int intensitycomp_single_fwd = 0;
1939+ int luma_scale1 = 0;
1940+ int luma_shift1 = 0;
19191941
19201942 assert(decode_state->pic_param && decode_state->pic_param->buffer);
19211943 pic_param = (VAPictureParameterBufferVC1 *)decode_state->pic_param->buffer;
1922- intensitycomp_single = (pic_param->mv_fields.bits.mv_mode == VAMvModeIntensityCompensation);
1944+ picture_type = pic_param->picture_fields.bits.picture_type;
1945+
1946+ if (gen7_mfd_context->reference_surface[0].surface_id != VA_INVALID_ID) {
1947+ if (picture_type == 1 || picture_type == 2) { /* P/B picture */
1948+ struct gen7_vc1_surface *gen7_vc1_surface = gen7_mfd_context->reference_surface[0].obj_surface->private_data;
1949+
1950+ intensitycomp_single_fwd = gen7_vc1_surface->intensity_compensation;
1951+ luma_scale1 = gen7_vc1_surface->luma_scale;
1952+ luma_shift1 = gen7_vc1_surface->luma_shift;
1953+ }
1954+ }
19231955
19241956 BEGIN_BCS_BATCH(batch, 6);
19251957 OUT_BCS_BATCH(batch, MFX_VC1_PRED_PIPE_STATE | (6 - 2));
19261958 OUT_BCS_BATCH(batch,
19271959 0 << 14 | /* FIXME: double ??? */
19281960 0 << 12 |
1929- intensitycomp_single << 10 |
1930- intensitycomp_single << 8 |
1961+ intensitycomp_single_fwd << 10 |
1962+ 0 << 8 |
19311963 0 << 4 | /* FIXME: interlace mode */
19321964 0);
19331965 OUT_BCS_BATCH(batch,
1934- pic_param->luma_shift << 16 |
1935- pic_param->luma_scale << 0); /* FIXME: Luma Scaling */
1966+ luma_shift1 << 16 |
1967+ luma_scale1 << 0);
19361968 OUT_BCS_BATCH(batch, 0);
19371969 OUT_BCS_BATCH(batch, 0);
19381970 OUT_BCS_BATCH(batch, 0);
--- a/src/gen7_mfd.c
+++ b/src/gen7_mfd.c
@@ -1253,6 +1253,9 @@ gen7_mfd_init_vc1_surface(VADriverContextP ctx,
12531253 }
12541254
12551255 gen7_vc1_surface->picture_type = pic_param->picture_fields.bits.picture_type;
1256+ gen7_vc1_surface->intensity_compensation = 0;
1257+ gen7_vc1_surface->luma_scale = 0;
1258+ gen7_vc1_surface->luma_shift = 0;
12561259
12571260 if (gen7_vc1_surface->dmv == NULL) {
12581261 gen7_vc1_surface->dmv = dri_bo_alloc(i965->intel.bufmgr,
@@ -1273,17 +1276,33 @@ gen7_mfd_vc1_decode_init(VADriverContextP ctx,
12731276 dri_bo *bo;
12741277 int width_in_mbs;
12751278 int picture_type;
1279+ int intensity_compensation;
12761280
12771281 assert(decode_state->pic_param && decode_state->pic_param->buffer);
12781282 pic_param = (VAPictureParameterBufferVC1 *)decode_state->pic_param->buffer;
12791283 width_in_mbs = ALIGN(pic_param->coded_width, 16) / 16;
12801284 picture_type = pic_param->picture_fields.bits.picture_type;
1285+ intensity_compensation = (pic_param->mv_fields.bits.mv_mode == VAMvModeIntensityCompensation);
12811286
12821287 intel_update_vc1_frame_store_index(ctx,
12831288 decode_state,
12841289 pic_param,
12851290 gen7_mfd_context->reference_surface);
12861291
1292+ /* Forward reference picture */
1293+ obj_surface = decode_state->reference_objects[0];
1294+ if (pic_param->forward_reference_picture != VA_INVALID_ID &&
1295+ obj_surface &&
1296+ obj_surface->private_data) {
1297+ if (picture_type == 1 && intensity_compensation) { /* P picture */
1298+ struct gen7_vc1_surface *gen7_vc1_surface = obj_surface->private_data;
1299+
1300+ gen7_vc1_surface->intensity_compensation = intensity_compensation;
1301+ gen7_vc1_surface->luma_scale = pic_param->luma_scale;
1302+ gen7_vc1_surface->luma_shift = pic_param->luma_shift;
1303+ }
1304+ }
1305+
12871306 /* Current decoded picture */
12881307 obj_surface = decode_state->render_object;
12891308 i965_check_alloc_surface_bo(ctx, obj_surface, 1, VA_FOURCC_NV12, SUBSAMPLE_YUV420);
@@ -1650,24 +1669,37 @@ gen7_mfd_vc1_pred_pipe_state(VADriverContextP ctx,
16501669 {
16511670 struct intel_batchbuffer *batch = gen7_mfd_context->base.batch;
16521671 VAPictureParameterBufferVC1 *pic_param;
1653- int intensitycomp_single;
1672+ int picture_type;
1673+ int intensitycomp_single_fwd = 0;
1674+ int luma_scale1 = 0;
1675+ int luma_shift1 = 0;
16541676
16551677 assert(decode_state->pic_param && decode_state->pic_param->buffer);
16561678 pic_param = (VAPictureParameterBufferVC1 *)decode_state->pic_param->buffer;
1657- intensitycomp_single = (pic_param->mv_fields.bits.mv_mode == VAMvModeIntensityCompensation);
1679+ picture_type = pic_param->picture_fields.bits.picture_type;
1680+
1681+ if (gen7_mfd_context->reference_surface[0].surface_id != VA_INVALID_ID) {
1682+ if (picture_type == 1 || picture_type == 2) { /* P/B picture */
1683+ struct gen7_vc1_surface *gen7_vc1_surface = gen7_mfd_context->reference_surface[0].obj_surface->private_data;
1684+
1685+ intensitycomp_single_fwd = gen7_vc1_surface->intensity_compensation;
1686+ luma_scale1 = gen7_vc1_surface->luma_scale;
1687+ luma_shift1 = gen7_vc1_surface->luma_shift;
1688+ }
1689+ }
16581690
16591691 BEGIN_BCS_BATCH(batch, 6);
16601692 OUT_BCS_BATCH(batch, MFX_VC1_PRED_PIPE_STATE | (6 - 2));
16611693 OUT_BCS_BATCH(batch,
16621694 0 << 14 | /* FIXME: double ??? */
16631695 0 << 12 |
1664- intensitycomp_single << 10 |
1665- intensitycomp_single << 8 |
1696+ intensitycomp_single_fwd << 10 |
1697+ 0 << 8 |
16661698 0 << 4 | /* FIXME: interlace mode */
16671699 0);
16681700 OUT_BCS_BATCH(batch,
1669- pic_param->luma_shift << 16 |
1670- pic_param->luma_scale << 0); /* FIXME: Luma Scaling */
1701+ luma_shift1 << 16 |
1702+ luma_scale1 << 0);
16711703 OUT_BCS_BATCH(batch, 0);
16721704 OUT_BCS_BATCH(batch, 0);
16731705 OUT_BCS_BATCH(batch, 0);
--- a/src/gen7_mfd.h
+++ b/src/gen7_mfd.h
@@ -63,6 +63,9 @@
6363 struct gen7_vc1_surface {
6464 dri_bo *dmv;
6565 int picture_type;
66+ int intensity_compensation;
67+ int luma_scale;
68+ int luma_shift;
6669 };
6770
6871 struct hw_context;
--- a/src/gen8_mfd.c
+++ b/src/gen8_mfd.c
@@ -1297,6 +1297,9 @@ gen8_mfd_init_vc1_surface(VADriverContextP ctx,
12971297 }
12981298
12991299 gen7_vc1_surface->picture_type = pic_param->picture_fields.bits.picture_type;
1300+ gen7_vc1_surface->intensity_compensation = 0;
1301+ gen7_vc1_surface->luma_scale = 0;
1302+ gen7_vc1_surface->luma_shift = 0;
13001303
13011304 if (gen7_vc1_surface->dmv == NULL) {
13021305 gen7_vc1_surface->dmv = dri_bo_alloc(i965->intel.bufmgr,
@@ -1317,17 +1320,33 @@ gen8_mfd_vc1_decode_init(VADriverContextP ctx,
13171320 dri_bo *bo;
13181321 int width_in_mbs;
13191322 int picture_type;
1323+ int intensity_compensation;
13201324
13211325 assert(decode_state->pic_param && decode_state->pic_param->buffer);
13221326 pic_param = (VAPictureParameterBufferVC1 *)decode_state->pic_param->buffer;
13231327 width_in_mbs = ALIGN(pic_param->coded_width, 16) / 16;
13241328 picture_type = pic_param->picture_fields.bits.picture_type;
1329+ intensity_compensation = (pic_param->mv_fields.bits.mv_mode == VAMvModeIntensityCompensation);
13251330
13261331 intel_update_vc1_frame_store_index(ctx,
13271332 decode_state,
13281333 pic_param,
13291334 gen7_mfd_context->reference_surface);
13301335
1336+ /* Forward reference picture */
1337+ obj_surface = decode_state->reference_objects[0];
1338+ if (pic_param->forward_reference_picture != VA_INVALID_ID &&
1339+ obj_surface &&
1340+ obj_surface->private_data) {
1341+ if (picture_type == 1 && intensity_compensation) { /* P picture */
1342+ struct gen7_vc1_surface *gen7_vc1_surface = obj_surface->private_data;
1343+
1344+ gen7_vc1_surface->intensity_compensation = intensity_compensation;
1345+ gen7_vc1_surface->luma_scale = pic_param->luma_scale;
1346+ gen7_vc1_surface->luma_shift = pic_param->luma_shift;
1347+ }
1348+ }
1349+
13311350 /* Current decoded picture */
13321351 obj_surface = decode_state->render_object;
13331352 i965_check_alloc_surface_bo(ctx, obj_surface, 1, VA_FOURCC_NV12, SUBSAMPLE_YUV420);
@@ -1694,24 +1713,37 @@ gen8_mfd_vc1_pred_pipe_state(VADriverContextP ctx,
16941713 {
16951714 struct intel_batchbuffer *batch = gen7_mfd_context->base.batch;
16961715 VAPictureParameterBufferVC1 *pic_param;
1697- int intensitycomp_single;
1716+ int picture_type;
1717+ int intensitycomp_single_fwd = 0;
1718+ int luma_scale1 = 0;
1719+ int luma_shift1 = 0;
16981720
16991721 assert(decode_state->pic_param && decode_state->pic_param->buffer);
17001722 pic_param = (VAPictureParameterBufferVC1 *)decode_state->pic_param->buffer;
1701- intensitycomp_single = (pic_param->mv_fields.bits.mv_mode == VAMvModeIntensityCompensation);
1723+ picture_type = pic_param->picture_fields.bits.picture_type;
1724+
1725+ if (gen7_mfd_context->reference_surface[0].surface_id != VA_INVALID_ID) {
1726+ if (picture_type == 1 || picture_type == 2) { /* P/B picture */
1727+ struct gen7_vc1_surface *gen7_vc1_surface = gen7_mfd_context->reference_surface[0].obj_surface->private_data;
1728+
1729+ intensitycomp_single_fwd = gen7_vc1_surface->intensity_compensation;
1730+ luma_scale1 = gen7_vc1_surface->luma_scale;
1731+ luma_shift1 = gen7_vc1_surface->luma_shift;
1732+ }
1733+ }
17021734
17031735 BEGIN_BCS_BATCH(batch, 6);
17041736 OUT_BCS_BATCH(batch, MFX_VC1_PRED_PIPE_STATE | (6 - 2));
17051737 OUT_BCS_BATCH(batch,
17061738 0 << 14 | /* FIXME: double ??? */
17071739 0 << 12 |
1708- intensitycomp_single << 10 |
1709- intensitycomp_single << 8 |
1740+ intensitycomp_single_fwd << 10 |
1741+ 0 << 8 |
17101742 0 << 4 | /* FIXME: interlace mode */
17111743 0);
17121744 OUT_BCS_BATCH(batch,
1713- pic_param->luma_shift << 16 |
1714- pic_param->luma_scale << 0); /* FIXME: Luma Scaling */
1745+ luma_shift1 << 16 |
1746+ luma_scale1 << 0);
17151747 OUT_BCS_BATCH(batch, 0);
17161748 OUT_BCS_BATCH(batch, 0);
17171749 OUT_BCS_BATCH(batch, 0);