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Implementing figFORTH on SH3 assembler


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Revisión19e1281fea7ab3e8253395fc90d86744743aa143 (tree)
Tiempo2014-03-07 13:56:02
AutorJoel Matthew Rees <reiisi@user...>
CommiterJoel Matthew Rees

Log Message

missed one on the change from .src to .inc

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Diferencia incremental

--- a/primitive.inc
+++ b/primitive.inc
@@ -153,7 +153,7 @@ xPLOOPminus:
153153 ; (DO) ( limit index --- ) ( *** limit index )
154154 ; Move the loop parameters to the return stack. Synonym for D>R, here.
155155 ;
156- HEADER (DO), xDO
156+ HEADER (DO), xPDO
157157 mov.l @fSP+, r0
158158 mov.l @fSP+, r1
159159 add.l #-2*NATURAL_SIZE, fRP
--- a/primitive.src
+++ /dev/null
@@ -1,168 +0,0 @@
1- .list ON, EXP
2-
3-; Primitive (kernel) definitions for fig-FORTH for SH-3
4-; Joel Matthew Rees, Hyougo Polytec Center
5-; 2014.02.28
6-
7-
8-; Monolithic, not separate assembly:
9-; context.inc must be included before this file.
10-; .include "context.inc"
11-;
12-; .section primitives, code, align=4
13-
14-
15-; ***** Need to load the return register with something safe.
16-; Probably the call to next from warm?
17-;
18-; Anyway, this is the inner interpreter.
19-;
20-next:
21- mov.l @fIP+, fW ; get the pointer to the next definition to execute
22- mov.l @fW, r0 ; get the defitinition characteristic
23- jsr @r0
24-; 3 cycles to get back to the top of the loop.
25- nop
26- bra next
27- nop
28-; Note that, since jumps to absolute addresses have limits on constant-width instruction sets,
29-; using the subroutine call mode for the virtual machine is not as much a penalty as it might seem.
30-; It also has the advantage of being more compatible with more conventional code.
31-; Ways to make an absolute jump work might include
32-; * the address of next in a table of constants (and reserving a register for the table base), or
33-; * reserving a register for the address of next.
34-
35-
36-; LIT ( --- n ) C
37-; Push the following word from the instruction stream as a
38-; literal, or immediate value.
39-;
40- HEADER LIT, LIT
41- mov.l @fIP+, r0
42- mov.l r0, @-fSP
43- rts
44- nop
45-
46-
47-; "character" (byte or word) literal doesn't work on SH3
48-; It'll cause alignment problems.
49-
50-
51-; EXECUTE ( adr --- ) C
52-; Jump to address on stack. Used by the "outer" interpreter to
53-; interactively invoke routines. (Not compile-only in fig.)
54-;
55- HEADER EXECUTE, EXECUTE
56- mov.l @fSP+, fW
57- mov.l @fW, r0
58- jmp @r0 ; borrow the return there
59- nop
60-
61-
62-; BRANCH ( --- ) C
63-; Add the following word from the instruction stream to the
64-; instruction pointer (Y++). Causes a program branch.
65-;
66- HEADER BRANCH, BRANCH
67- mov.l @fIP+, r0
68-BRANCHgo:
69- add.l r0, fIP
70- rts
71- nop
72-
73-
74-; 0BRANCH ( f --- ) C
75-; BRANCH if flag is zero.
76-;
77- HEADER 0BRANCH, ZBRANCH
78- mov.l @fSP+, r0
79- cmp/eq #0, r0
80- bt/s BRANCHgo
81- mov.l @fIP+, r0
82- rts
83- nop
84-
85-
86-; fig-FORTH puts temporaries on the control stack. I prefer a third stack.
87-; But if we put I in registers, (DO) is affected.
88-; One might put I and the loop limit in, say, r8 and r9,
89-; but then they must be saved and restored,
90-; and interrupts have to avoid r8 and r9 or save them.
91-;
92-; Note: fig-FORTH +LOOP has an un-signed loop counter, but a signed increment.
93-; (JMR: but the increment is signed!)
94-
95-
96-; (LOOP) ( --- ) ( limit index *** limit index+1) C
97-; ( limit index *** )
98-; Counting loop primitive. The counter and limit are the top two
99-; words on the return stack. If the updated index/counter does
100-; not exceed the limit, a branch occurs. If it does, the branch
101-; does not occur, and the index and limit are dropped from the
102-; return stack.
103-;
104- HEADER (LOOP), xLOOP
105- mov.l @fRP, r0 ; I (loop counter)
106- add.l #1, r0
107- mov.l r0, @fRP ; update I
108- mov.l @(NATURAL_SIZE,fRP), r1 ; limit
109- cmp/ge r1, r0 ; r0 >= r1 ?
110- bf/s BRANCHgo ; not yet
111- mov.l @fIP+, r0
112- rts
113- add.l #2*NATURAL_SIZE, fRP
114-
115-
116-; (+LOOP) ( n --- ) ( limit index *** limit index+n ) C
117-; ( limit index *** )
118-; Loop with a variable increment. Terminates when the index
119-; crosses the boundary from one below the limit to the limit. A
120-; positive n will cause termination if the result index equals the
121-; limit. A negative n must cause the index to become less than
122-; the limit to cause loop termination.
123-;
124- HEADER (+LOOP), xPLOOP
125- mov.l @fSP+, r1 ; increment
126- mov.l @fRP, r0 ; I (loop counter)
127- add.l r1, r0
128- mov.l r0, @fRP ; update I
129- shal r1 ; increment negative or positive?
130- bt/s xPLOOPminus
131- mov.l @(NATURAL_SIZE,fRP), r1 ; limit
132-;
133-; Stealing too much code would cost more than it would save.
134-xPLOOPplus:
135- cmp/ge r0, r1 ; limit (r1) >= counter (I=r0) ?
136- bf/s BRANCHgo ; not yet
137- mov.l @fIP+, r0 ; grab offset and bump fIP before we go
138- rts
139- add.l #2*NATURAL_SIZE, fRP ; drop I and limit before we return
140-;
141-xPLOOPminus:
142- cmp/ge r0, r1 ; limit (r1) >= counter (I=r0) ?
143- bt/s BRANCHgo ; not yet
144- mov.l @fIP+, r0 ; grab offset and bump fIP before we go
145- rts
146- add.l #2*NATURAL_SIZE, fRP ; drop I and limit before we return
147-
148-
149-; Putting I and limit in registers would require (DO) to save the registers first
150-; and it would require LOOP and +LOOP to restore the registers on exit.
151-; That would cost more than it would save.
152-;
153-; (DO) ( limit index --- ) ( *** limit index )
154-; Move the loop parameters to the return stack. Synonym for D>R, here.
155-;
156- HEADER (DO), xPDO
157- mov.l @fSP+, r0
158- mov.l @fSP+, r1
159- add.l #-2*NATURAL_SIZE, fRP
160- mov.l r1, @(NATURAL_SIZE,fRP)
161- mov.l r0, @fRP
162- rts
163-
164-
165-
166-
167-
168-