Revisión | b04f19a852038ba25131bf04db8c6a517a361971 (tree) |
---|---|
Tiempo | 2019-08-19 23:59:27 |
Autor | Yoshinori Sato <ysato@user...> |
Commiter | Yoshinori Sato |
sh: Add feature
@@ -68,6 +68,8 @@ WHICH = arm/arm-with-iwmmxt arm/arm-with-vfpv2 arm/arm-with-vfpv3 \ | ||
68 | 68 | s390-te-linux64 s390x-te-linux64 s390-vx-linux64 s390x-vx-linux64 \ |
69 | 69 | s390-tevx-linux64 s390x-tevx-linux64 \ |
70 | 70 | s390-gs-linux64 s390x-gs-linux64 \ |
71 | + sh/sh sh/sh-dsp sh/sh-fpu sh/sh2a-nofpu sh/sh2a-fpu \ | |
72 | + sh/sh3 sh/sh4-dfp sh/sh4-vfp \ | |
71 | 73 | tic6x-c64xp-linux tic6x-c64x-linux tic6x-c62x-linux |
72 | 74 | |
73 | 75 | # Record which registers should be sent to GDB by default after stop. |
@@ -238,6 +240,14 @@ FEATURE_XMLFILES = aarch64-core.xml \ | ||
238 | 240 | riscv/64bit-cpu.xml \ |
239 | 241 | riscv/64bit-csr.xml \ |
240 | 242 | riscv/64bit-fpu.xml \ |
243 | + sh/sh.xml \ | |
244 | + sh/sh-dsp.xml \ | |
245 | + sh/sh-fpu.xml \ | |
246 | + sh/sh2a-nofpu.xml \ | |
247 | + sh/sh2a-fpu.xml \ | |
248 | + sh/sh3.xml \ | |
249 | + sh/sh4-dfp.xml \ | |
250 | + sh/sh4-vfp.xml \ | |
241 | 251 | tic6x-c6xp.xml \ |
242 | 252 | tic6x-core.xml \ |
243 | 253 | tic6x-gp.xml |
@@ -0,0 +1,41 @@ | ||
1 | +/* THIS FILE IS GENERATED. -*- buffer-read-only: t -*- vi:set ro: | |
2 | + Original: sh-dsp.xml.tmp */ | |
3 | + | |
4 | +#include "defs.h" | |
5 | +#include "osabi.h" | |
6 | +#include "target-descriptions.h" | |
7 | + | |
8 | +struct target_desc *tdesc_sh_dsp; | |
9 | +static void | |
10 | +initialize_tdesc_sh_dsp (void) | |
11 | +{ | |
12 | + struct target_desc *result = allocate_target_description (); | |
13 | + struct tdesc_feature *feature; | |
14 | + | |
15 | + feature = tdesc_create_feature (result, "org.gnu.gdb.sh.dsp"); | |
16 | + tdesc_type_with_fields *type_with_fields; | |
17 | + type_with_fields = tdesc_create_flags (feature, "dsr_flags", 4); | |
18 | + tdesc_add_flag (type_with_fields, 0, "DC"); | |
19 | + tdesc_add_bitfield (type_with_fields, "CS", 1, 3); | |
20 | + tdesc_add_flag (type_with_fields, 4, "V"); | |
21 | + tdesc_add_flag (type_with_fields, 5, "N"); | |
22 | + tdesc_add_flag (type_with_fields, 6, "Z"); | |
23 | + tdesc_add_flag (type_with_fields, 7, "GT"); | |
24 | + | |
25 | + tdesc_create_reg (feature, "dsr", 24, 1, NULL, 32, "dsr_flags"); | |
26 | + tdesc_create_reg (feature, "a0g", 25, 1, NULL, 32, "uint32"); | |
27 | + tdesc_create_reg (feature, "a0", 26, 1, NULL, 32, "uint32"); | |
28 | + tdesc_create_reg (feature, "a1g", 27, 1, NULL, 32, "uint32"); | |
29 | + tdesc_create_reg (feature, "a1", 28, 1, NULL, 32, "uint32"); | |
30 | + tdesc_create_reg (feature, "m0", 29, 1, NULL, 32, "uint32"); | |
31 | + tdesc_create_reg (feature, "m1", 30, 1, NULL, 32, "uint32"); | |
32 | + tdesc_create_reg (feature, "x0", 31, 1, NULL, 32, "uint32"); | |
33 | + tdesc_create_reg (feature, "x1", 32, 1, NULL, 32, "uint32"); | |
34 | + tdesc_create_reg (feature, "y0", 33, 1, NULL, 32, "uint32"); | |
35 | + tdesc_create_reg (feature, "y1", 34, 1, NULL, 32, "uint32"); | |
36 | + tdesc_create_reg (feature, "mod", 39, 1, NULL, 32, "uint32"); | |
37 | + tdesc_create_reg (feature, "rs", 42, 1, NULL, 32, "uint32"); | |
38 | + tdesc_create_reg (feature, "re", 43, 1, NULL, 32, "uint32"); | |
39 | + | |
40 | + tdesc_sh_dsp = result; | |
41 | +} |
@@ -0,0 +1,32 @@ | ||
1 | +<?xml version="1.0"?> | |
2 | +<!-- Copyright (C) 2019 Free Software Foundation, Inc. | |
3 | + | |
4 | + Copying and distribution of this file, with or without modification, | |
5 | + are permitted in any medium without royalty provided the copyright | |
6 | + notice and this notice are preserved. --> | |
7 | + | |
8 | +<!DOCTYPE feature SYSTEM "gdb-target.dtd"> | |
9 | +<feature name="org.gnu.gdb.sh.dsp"> | |
10 | + <flags id="dsr_flags" size="4"> | |
11 | + <field name="DC" start="0" end="0"/> | |
12 | + <field name="CS" start="1" end="3"/> | |
13 | + <field name="V" start="4" end="4"/> | |
14 | + <field name="N" start="5" end="5"/> | |
15 | + <field name="Z" start="6" end="6"/> | |
16 | + <field name="GT" start="7" end="7"/> | |
17 | + </flags> | |
18 | + <reg name="dsr" bitsize="32" type="dsr_flags" regnum="24"/> | |
19 | + <reg name="a0g" bitsize="32" type="uint32"/> | |
20 | + <reg name="a0" bitsize="32" type="uint32"/> | |
21 | + <reg name="a1g" bitsize="32" type="uint32"/> | |
22 | + <reg name="a1" bitsize="32" type="uint32"/> | |
23 | + <reg name="m0" bitsize="32" type="uint32"/> | |
24 | + <reg name="m1" bitsize="32" type="uint32"/> | |
25 | + <reg name="x0" bitsize="32" type="uint32"/> | |
26 | + <reg name="x1" bitsize="32" type="uint32"/> | |
27 | + <reg name="y0" bitsize="32" type="uint32"/> | |
28 | + <reg name="y1" bitsize="32" type="uint32"/> | |
29 | + <reg name="mod" bitsize="32" type="uint32" regnum="39"/> | |
30 | + <reg name="rs" bitsize="32" type="uint32" regnum="42"/> | |
31 | + <reg name="re" bitsize="32" type="uint32"/> | |
32 | +</feature> |
@@ -0,0 +1,57 @@ | ||
1 | +/* THIS FILE IS GENERATED. -*- buffer-read-only: t -*- vi:set ro: | |
2 | + Original: sh-fpu.xml.tmp */ | |
3 | + | |
4 | +#include "defs.h" | |
5 | +#include "osabi.h" | |
6 | +#include "target-descriptions.h" | |
7 | + | |
8 | +struct target_desc *tdesc_sh_fpu; | |
9 | +static void | |
10 | +initialize_tdesc_sh_fpu (void) | |
11 | +{ | |
12 | + struct target_desc *result = allocate_target_description (); | |
13 | + struct tdesc_feature *feature; | |
14 | + | |
15 | + feature = tdesc_create_feature (result, "org.gnu.gdb.sh.fpu"); | |
16 | + tdesc_type_with_fields *type_with_fields; | |
17 | + type_with_fields = tdesc_create_flags (feature, "fpcsr_flags", 4); | |
18 | + tdesc_add_bitfield (type_with_fields, "RM", 0, 1); | |
19 | + tdesc_add_flag (type_with_fields, 2, "FI"); | |
20 | + tdesc_add_flag (type_with_fields, 3, "FU"); | |
21 | + tdesc_add_flag (type_with_fields, 4, "FO"); | |
22 | + tdesc_add_flag (type_with_fields, 5, "FZ"); | |
23 | + tdesc_add_flag (type_with_fields, 6, "FV"); | |
24 | + tdesc_add_flag (type_with_fields, 7, "EI"); | |
25 | + tdesc_add_flag (type_with_fields, 8, "EU"); | |
26 | + tdesc_add_flag (type_with_fields, 9, "EO"); | |
27 | + tdesc_add_flag (type_with_fields, 10, "EZ"); | |
28 | + tdesc_add_flag (type_with_fields, 11, "EV"); | |
29 | + tdesc_add_flag (type_with_fields, 12, "CI"); | |
30 | + tdesc_add_flag (type_with_fields, 13, "CU"); | |
31 | + tdesc_add_flag (type_with_fields, 14, "CO"); | |
32 | + tdesc_add_flag (type_with_fields, 15, "CZ"); | |
33 | + tdesc_add_flag (type_with_fields, 16, "CV"); | |
34 | + tdesc_add_flag (type_with_fields, 17, "CE"); | |
35 | + tdesc_add_flag (type_with_fields, 18, "DN"); | |
36 | + | |
37 | + tdesc_create_reg (feature, "fpul", 24, 1, NULL, 32, "uint32"); | |
38 | + tdesc_create_reg (feature, "fpcsr", 25, 1, NULL, 32, "fpcsr_flags"); | |
39 | + tdesc_create_reg (feature, "fr0", 26, 1, NULL, 32, "ieee_single"); | |
40 | + tdesc_create_reg (feature, "fr1", 27, 1, NULL, 32, "ieee_single"); | |
41 | + tdesc_create_reg (feature, "fr2", 28, 1, NULL, 32, "ieee_single"); | |
42 | + tdesc_create_reg (feature, "fr3", 29, 1, NULL, 32, "ieee_single"); | |
43 | + tdesc_create_reg (feature, "fr4", 30, 1, NULL, 32, "ieee_single"); | |
44 | + tdesc_create_reg (feature, "fr5", 31, 1, NULL, 32, "ieee_single"); | |
45 | + tdesc_create_reg (feature, "fr6", 32, 1, NULL, 32, "ieee_single"); | |
46 | + tdesc_create_reg (feature, "fr7", 33, 1, NULL, 32, "ieee_single"); | |
47 | + tdesc_create_reg (feature, "fr8", 34, 1, NULL, 32, "ieee_single"); | |
48 | + tdesc_create_reg (feature, "fr9", 35, 1, NULL, 32, "ieee_single"); | |
49 | + tdesc_create_reg (feature, "fr10", 36, 1, NULL, 32, "ieee_single"); | |
50 | + tdesc_create_reg (feature, "fr11", 37, 1, NULL, 32, "ieee_single"); | |
51 | + tdesc_create_reg (feature, "fr12", 38, 1, NULL, 32, "ieee_single"); | |
52 | + tdesc_create_reg (feature, "fr13", 39, 1, NULL, 32, "ieee_single"); | |
53 | + tdesc_create_reg (feature, "fr14", 40, 1, NULL, 32, "ieee_single"); | |
54 | + tdesc_create_reg (feature, "fr15", 41, 1, NULL, 32, "ieee_single"); | |
55 | + | |
56 | + tdesc_sh_fpu = result; | |
57 | +} |
@@ -0,0 +1,49 @@ | ||
1 | +<?xml version="1.0"?> | |
2 | +<!-- Copyright (C) 2019 Free Software Foundation, Inc. | |
3 | + | |
4 | + Copying and distribution of this file, with or without modification, | |
5 | + are permitted in any medium without royalty provided the copyright | |
6 | + notice and this notice are preserved. --> | |
7 | + | |
8 | +<!DOCTYPE feature SYSTEM "gdb-target.dtd"> | |
9 | +<feature name="org.gnu.gdb.sh.fpu"> | |
10 | + <reg name="fpul" bitsize="32" type="uint32" regnum="24"/> | |
11 | + <flags id="fpcsr_flags" size="4"> | |
12 | + <field name="RM" start="0" end="1"/> | |
13 | + <field name="FI" start="2" end="2"/> | |
14 | + <field name="FU" start="3" end="3"/> | |
15 | + <field name="FO" start="4" end="4"/> | |
16 | + <field name="FZ" start="5" end="5"/> | |
17 | + <field name="FV" start="6" end="6"/> | |
18 | + <field name="EI" start="7" end="7"/> | |
19 | + <field name="EU" start="8" end="8"/> | |
20 | + <field name="EO" start="9" end="9"/> | |
21 | + <field name="EZ" start="10" end="10"/> | |
22 | + <field name="EV" start="11" end="11"/> | |
23 | + <field name="CI" start="12" end="12"/> | |
24 | + <field name="CU" start="13" end="13"/> | |
25 | + <field name="CO" start="14" end="14"/> | |
26 | + <field name="CZ" start="15" end="15"/> | |
27 | + <field name="CV" start="16" end="16"/> | |
28 | + <field name="CE" start="17" end="17"/> | |
29 | + <field name="DN" start="18" end="18"/> | |
30 | + </flags> | |
31 | + <reg name="fpcsr" bitsize="32" type="fpcsr_flags"/> | |
32 | + | |
33 | + <reg name="fr0" bitsize="32" type="ieee_single"/> | |
34 | + <reg name="fr1" bitsize="32" type="ieee_single"/> | |
35 | + <reg name="fr2" bitsize="32" type="ieee_single"/> | |
36 | + <reg name="fr3" bitsize="32" type="ieee_single"/> | |
37 | + <reg name="fr4" bitsize="32" type="ieee_single"/> | |
38 | + <reg name="fr5" bitsize="32" type="ieee_single"/> | |
39 | + <reg name="fr6" bitsize="32" type="ieee_single"/> | |
40 | + <reg name="fr7" bitsize="32" type="ieee_single"/> | |
41 | + <reg name="fr8" bitsize="32" type="ieee_single"/> | |
42 | + <reg name="fr9" bitsize="32" type="ieee_single"/> | |
43 | + <reg name="fr10" bitsize="32" type="ieee_single"/> | |
44 | + <reg name="fr11" bitsize="32" type="ieee_single"/> | |
45 | + <reg name="fr12" bitsize="32" type="ieee_single"/> | |
46 | + <reg name="fr13" bitsize="32" type="ieee_single"/> | |
47 | + <reg name="fr14" bitsize="32" type="ieee_single"/> | |
48 | + <reg name="fr15" bitsize="32" type="ieee_single"/> | |
49 | +</feature> |
@@ -0,0 +1,49 @@ | ||
1 | +/* THIS FILE IS GENERATED. -*- buffer-read-only: t -*- vi:set ro: | |
2 | + Original: sh.xml.tmp */ | |
3 | + | |
4 | +#include "defs.h" | |
5 | +#include "osabi.h" | |
6 | +#include "target-descriptions.h" | |
7 | + | |
8 | +struct target_desc *tdesc_sh; | |
9 | +static void | |
10 | +initialize_tdesc_sh (void) | |
11 | +{ | |
12 | + struct target_desc *result = allocate_target_description (); | |
13 | + struct tdesc_feature *feature; | |
14 | + | |
15 | + feature = tdesc_create_feature (result, "org.gnu.gdb.sh.core"); | |
16 | + tdesc_type_with_fields *type_with_fields; | |
17 | + type_with_fields = tdesc_create_flags (feature, "sr_flags", 4); | |
18 | + tdesc_add_flag (type_with_fields, 0, "T"); | |
19 | + tdesc_add_flag (type_with_fields, 1, "S"); | |
20 | + tdesc_add_bitfield (type_with_fields, "I", 4, 7); | |
21 | + tdesc_add_flag (type_with_fields, 8, "Q"); | |
22 | + tdesc_add_flag (type_with_fields, 9, "M"); | |
23 | + | |
24 | + tdesc_create_reg (feature, "r0", 0, 1, NULL, 32, "uint32"); | |
25 | + tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "uint32"); | |
26 | + tdesc_create_reg (feature, "r2", 2, 1, NULL, 32, "uint32"); | |
27 | + tdesc_create_reg (feature, "r3", 3, 1, NULL, 32, "uint32"); | |
28 | + tdesc_create_reg (feature, "r4", 4, 1, NULL, 32, "uint32"); | |
29 | + tdesc_create_reg (feature, "r5", 5, 1, NULL, 32, "uint32"); | |
30 | + tdesc_create_reg (feature, "r6", 6, 1, NULL, 32, "uint32"); | |
31 | + tdesc_create_reg (feature, "r7", 7, 1, NULL, 32, "uint32"); | |
32 | + tdesc_create_reg (feature, "r8", 8, 1, NULL, 32, "uint32"); | |
33 | + tdesc_create_reg (feature, "r9", 9, 1, NULL, 32, "uint32"); | |
34 | + tdesc_create_reg (feature, "r10", 10, 1, NULL, 32, "uint32"); | |
35 | + tdesc_create_reg (feature, "r11", 11, 1, NULL, 32, "uint32"); | |
36 | + tdesc_create_reg (feature, "r12", 12, 1, NULL, 32, "uint32"); | |
37 | + tdesc_create_reg (feature, "r13", 13, 1, NULL, 32, "uint32"); | |
38 | + tdesc_create_reg (feature, "r14", 14, 1, NULL, 32, "uint32"); | |
39 | + tdesc_create_reg (feature, "r15", 15, 1, NULL, 32, "data_ptr"); | |
40 | + tdesc_create_reg (feature, "pc", 16, 1, NULL, 32, "code_ptr"); | |
41 | + tdesc_create_reg (feature, "pr", 17, 1, NULL, 32, "code_ptr"); | |
42 | + tdesc_create_reg (feature, "gbr", 18, 1, NULL, 32, "data_ptr"); | |
43 | + tdesc_create_reg (feature, "vbr", 19, 1, NULL, 32, "data_ptr"); | |
44 | + tdesc_create_reg (feature, "mach", 20, 1, NULL, 32, "uint32"); | |
45 | + tdesc_create_reg (feature, "macl", 21, 1, NULL, 32, "uint32"); | |
46 | + tdesc_create_reg (feature, "sr", 22, 1, NULL, 32, "sr_flags"); | |
47 | + | |
48 | + tdesc_sh = result; | |
49 | +} |
@@ -0,0 +1,41 @@ | ||
1 | +<?xml version="1.0"?> | |
2 | +<!-- Copyright (C) 2019 Free Software Foundation, Inc. | |
3 | + | |
4 | + Copying and distribution of this file, with or without modification, | |
5 | + are permitted in any medium without royalty provided the copyright | |
6 | + notice and this notice are preserved. --> | |
7 | + | |
8 | +<!DOCTYPE feature SYSTEM "gdb-target.dtd"> | |
9 | +<feature name="org.gnu.gdb.sh.core"> | |
10 | + <reg name="r0" bitsize="32" type="uint32"/> | |
11 | + <reg name="r1" bitsize="32" type="uint32"/> | |
12 | + <reg name="r2" bitsize="32" type="uint32"/> | |
13 | + <reg name="r3" bitsize="32" type="uint32"/> | |
14 | + <reg name="r4" bitsize="32" type="uint32"/> | |
15 | + <reg name="r5" bitsize="32" type="uint32"/> | |
16 | + <reg name="r6" bitsize="32" type="uint32"/> | |
17 | + <reg name="r7" bitsize="32" type="uint32"/> | |
18 | + <reg name="r8" bitsize="32" type="uint32"/> | |
19 | + <reg name="r9" bitsize="32" type="uint32"/> | |
20 | + <reg name="r10" bitsize="32" type="uint32"/> | |
21 | + <reg name="r11" bitsize="32" type="uint32"/> | |
22 | + <reg name="r12" bitsize="32" type="uint32"/> | |
23 | + <reg name="r13" bitsize="32" type="uint32"/> | |
24 | + <reg name="r14" bitsize="32" type="uint32"/> | |
25 | + <reg name="r15" bitsize="32" type="data_ptr"/> | |
26 | + | |
27 | + <reg name="pc" bitsize="32" type="code_ptr"/> | |
28 | + <reg name="pr" bitsize="32" type="code_ptr"/> | |
29 | + <reg name="gbr" bitsize="32" type="data_ptr"/> | |
30 | + <reg name="vbr" bitsize="32" type="data_ptr"/> | |
31 | + <reg name="mach" bitsize="32" type="uint32"/> | |
32 | + <reg name="macl" bitsize="32" type="uint32"/> | |
33 | + <flags id="sr_flags" size="4"> | |
34 | + <field name="T" start="0" end="0"/> | |
35 | + <field name="S" start="1" end="1"/> | |
36 | + <field name="I" start="4" end="7"/> | |
37 | + <field name="Q" start="8" end="8"/> | |
38 | + <field name="M" start="9" end="9"/> | |
39 | + </flags> | |
40 | + <reg name="sr" bitsize="32" type="sr_flags"/> | |
41 | +</feature> |
@@ -0,0 +1,68 @@ | ||
1 | +/* THIS FILE IS GENERATED. -*- buffer-read-only: t -*- vi:set ro: | |
2 | + Original: sh2a-fpu.xml.tmp */ | |
3 | + | |
4 | +#include "defs.h" | |
5 | +#include "osabi.h" | |
6 | +#include "target-descriptions.h" | |
7 | + | |
8 | +struct target_desc *tdesc_sh2a_fpu; | |
9 | +static void | |
10 | +initialize_tdesc_sh2a_fpu (void) | |
11 | +{ | |
12 | + struct target_desc *result = allocate_target_description (); | |
13 | + struct tdesc_feature *feature; | |
14 | + | |
15 | + feature = tdesc_create_feature (result, "org.gnu.gdb.sh.sh2a-fpu"); | |
16 | + tdesc_type_with_fields *type_with_fields; | |
17 | + type_with_fields = tdesc_create_flags (feature, "fpcsr_flags", 4); | |
18 | + tdesc_add_bitfield (type_with_fields, "RM", 0, 1); | |
19 | + tdesc_add_flag (type_with_fields, 2, "FI"); | |
20 | + tdesc_add_flag (type_with_fields, 3, "FU"); | |
21 | + tdesc_add_flag (type_with_fields, 4, "FO"); | |
22 | + tdesc_add_flag (type_with_fields, 5, "FZ"); | |
23 | + tdesc_add_flag (type_with_fields, 6, "FV"); | |
24 | + tdesc_add_flag (type_with_fields, 7, "EI"); | |
25 | + tdesc_add_flag (type_with_fields, 8, "EU"); | |
26 | + tdesc_add_flag (type_with_fields, 9, "EO"); | |
27 | + tdesc_add_flag (type_with_fields, 10, "EZ"); | |
28 | + tdesc_add_flag (type_with_fields, 11, "EV"); | |
29 | + tdesc_add_flag (type_with_fields, 12, "CI"); | |
30 | + tdesc_add_flag (type_with_fields, 13, "CU"); | |
31 | + tdesc_add_flag (type_with_fields, 14, "CO"); | |
32 | + tdesc_add_flag (type_with_fields, 15, "CZ"); | |
33 | + tdesc_add_flag (type_with_fields, 16, "CV"); | |
34 | + tdesc_add_flag (type_with_fields, 17, "CE"); | |
35 | + tdesc_add_flag (type_with_fields, 18, "DN"); | |
36 | + tdesc_add_flag (type_with_fields, 19, "PR"); | |
37 | + tdesc_add_flag (type_with_fields, 20, "SZ"); | |
38 | + tdesc_add_flag (type_with_fields, 22, "QIS"); | |
39 | + | |
40 | + tdesc_create_reg (feature, "fpul", 23, 1, NULL, 32, "uint32"); | |
41 | + tdesc_create_reg (feature, "fpcsr", 24, 1, NULL, 32, "fpcsr_flags"); | |
42 | + tdesc_create_reg (feature, "fr0", 25, 1, NULL, 32, "ieee_single"); | |
43 | + tdesc_create_reg (feature, "fr1", 26, 1, NULL, 32, "ieee_single"); | |
44 | + tdesc_create_reg (feature, "fr2", 27, 1, NULL, 32, "ieee_single"); | |
45 | + tdesc_create_reg (feature, "fr3", 28, 1, NULL, 32, "ieee_single"); | |
46 | + tdesc_create_reg (feature, "fr4", 29, 1, NULL, 32, "ieee_single"); | |
47 | + tdesc_create_reg (feature, "fr5", 30, 1, NULL, 32, "ieee_single"); | |
48 | + tdesc_create_reg (feature, "fr6", 31, 1, NULL, 32, "ieee_single"); | |
49 | + tdesc_create_reg (feature, "fr7", 32, 1, NULL, 32, "ieee_single"); | |
50 | + tdesc_create_reg (feature, "fr8", 33, 1, NULL, 32, "ieee_single"); | |
51 | + tdesc_create_reg (feature, "fr9", 34, 1, NULL, 32, "ieee_single"); | |
52 | + tdesc_create_reg (feature, "fr10", 35, 1, NULL, 32, "ieee_single"); | |
53 | + tdesc_create_reg (feature, "fr11", 36, 1, NULL, 32, "ieee_single"); | |
54 | + tdesc_create_reg (feature, "fr12", 37, 1, NULL, 32, "ieee_single"); | |
55 | + tdesc_create_reg (feature, "fr13", 38, 1, NULL, 32, "ieee_single"); | |
56 | + tdesc_create_reg (feature, "fr14", 39, 1, NULL, 32, "ieee_single"); | |
57 | + tdesc_create_reg (feature, "fr15", 40, 1, NULL, 32, "ieee_single"); | |
58 | + tdesc_create_reg (feature, "dr0", 68, 1, NULL, 32, "ieee_double"); | |
59 | + tdesc_create_reg (feature, "dr2", 69, 1, NULL, 32, "ieee_double"); | |
60 | + tdesc_create_reg (feature, "dr4", 70, 1, NULL, 32, "ieee_double"); | |
61 | + tdesc_create_reg (feature, "dr6", 71, 1, NULL, 32, "ieee_double"); | |
62 | + tdesc_create_reg (feature, "dr8", 72, 1, NULL, 32, "ieee_double"); | |
63 | + tdesc_create_reg (feature, "dr10", 73, 1, NULL, 32, "ieee_double"); | |
64 | + tdesc_create_reg (feature, "dr12", 74, 1, NULL, 32, "ieee_double"); | |
65 | + tdesc_create_reg (feature, "dr14", 75, 1, NULL, 32, "ieee_double"); | |
66 | + | |
67 | + tdesc_sh2a_fpu = result; | |
68 | +} |
@@ -0,0 +1,61 @@ | ||
1 | +<?xml version="1.0"?> | |
2 | +<!-- Copyright (C) 2019 Free Software Foundation, Inc. | |
3 | + | |
4 | + Copying and distribution of this file, with or without modification, | |
5 | + are permitted in any medium without royalty provided the copyright | |
6 | + notice and this notice are preserved. --> | |
7 | + | |
8 | +<!DOCTYPE feature SYSTEM "gdb-target.dtd"> | |
9 | +<feature name="org.gnu.gdb.sh.sh2a-fpu"> | |
10 | + <reg name="fpul" bitsize="32" type="uint32" regnum="23"/> | |
11 | + <flags id="fpcsr_flags" size="4"> | |
12 | + <field name="RM" start="0" end="1"/> | |
13 | + <field name="FI" start="2" end="2"/> | |
14 | + <field name="FU" start="3" end="3"/> | |
15 | + <field name="FO" start="4" end="4"/> | |
16 | + <field name="FZ" start="5" end="5"/> | |
17 | + <field name="FV" start="6" end="6"/> | |
18 | + <field name="EI" start="7" end="7"/> | |
19 | + <field name="EU" start="8" end="8"/> | |
20 | + <field name="EO" start="9" end="9"/> | |
21 | + <field name="EZ" start="10" end="10"/> | |
22 | + <field name="EV" start="11" end="11"/> | |
23 | + <field name="CI" start="12" end="12"/> | |
24 | + <field name="CU" start="13" end="13"/> | |
25 | + <field name="CO" start="14" end="14"/> | |
26 | + <field name="CZ" start="15" end="15"/> | |
27 | + <field name="CV" start="16" end="16"/> | |
28 | + <field name="CE" start="17" end="17"/> | |
29 | + <field name="DN" start="18" end="18"/> | |
30 | + <field name="PR" start="19" end="19"/> | |
31 | + <field name="SZ" start="20" end="20"/> | |
32 | + <field name="QIS" start="22" end="22"/> | |
33 | + </flags> | |
34 | + <reg name="fpcsr" bitsize="32" type="fpcsr_flags"/> | |
35 | + | |
36 | + <reg name="fr0" bitsize="32" type="ieee_single"/> | |
37 | + <reg name="fr1" bitsize="32" type="ieee_single"/> | |
38 | + <reg name="fr2" bitsize="32" type="ieee_single"/> | |
39 | + <reg name="fr3" bitsize="32" type="ieee_single"/> | |
40 | + <reg name="fr4" bitsize="32" type="ieee_single"/> | |
41 | + <reg name="fr5" bitsize="32" type="ieee_single"/> | |
42 | + <reg name="fr6" bitsize="32" type="ieee_single"/> | |
43 | + <reg name="fr7" bitsize="32" type="ieee_single"/> | |
44 | + <reg name="fr8" bitsize="32" type="ieee_single"/> | |
45 | + <reg name="fr9" bitsize="32" type="ieee_single"/> | |
46 | + <reg name="fr10" bitsize="32" type="ieee_single"/> | |
47 | + <reg name="fr11" bitsize="32" type="ieee_single"/> | |
48 | + <reg name="fr12" bitsize="32" type="ieee_single"/> | |
49 | + <reg name="fr13" bitsize="32" type="ieee_single"/> | |
50 | + <reg name="fr14" bitsize="32" type="ieee_single"/> | |
51 | + <reg name="fr15" bitsize="32" type="ieee_single"/> | |
52 | + | |
53 | + <reg name="dr0" bitsize="32" type="ieee_double" regnum="68"/> | |
54 | + <reg name="dr2" bitsize="32" type="ieee_double"/> | |
55 | + <reg name="dr4" bitsize="32" type="ieee_double"/> | |
56 | + <reg name="dr6" bitsize="32" type="ieee_double"/> | |
57 | + <reg name="dr8" bitsize="32" type="ieee_double"/> | |
58 | + <reg name="dr10" bitsize="32" type="ieee_double"/> | |
59 | + <reg name="dr12" bitsize="32" type="ieee_double"/> | |
60 | + <reg name="dr14" bitsize="32" type="ieee_double"/> | |
61 | +</feature> |
@@ -0,0 +1,76 @@ | ||
1 | +/* THIS FILE IS GENERATED. -*- buffer-read-only: t -*- vi:set ro: | |
2 | + Original: sh2a-nofpu.xml.tmp */ | |
3 | + | |
4 | +#include "defs.h" | |
5 | +#include "osabi.h" | |
6 | +#include "target-descriptions.h" | |
7 | + | |
8 | +struct target_desc *tdesc_sh2a_nofpu; | |
9 | +static void | |
10 | +initialize_tdesc_sh2a_nofpu (void) | |
11 | +{ | |
12 | + struct target_desc *result = allocate_target_description (); | |
13 | + struct tdesc_feature *feature; | |
14 | + | |
15 | + feature = tdesc_create_feature (result, "org.gnu.gdb.sh.sh2a"); | |
16 | + tdesc_type_with_fields *type_with_fields; | |
17 | + type_with_fields = tdesc_create_flags (feature, "sr_flags", 4); | |
18 | + tdesc_add_flag (type_with_fields, 0, "T"); | |
19 | + tdesc_add_flag (type_with_fields, 1, "S"); | |
20 | + tdesc_add_bitfield (type_with_fields, "I", 4, 7); | |
21 | + tdesc_add_flag (type_with_fields, 8, "Q"); | |
22 | + tdesc_add_flag (type_with_fields, 9, "M"); | |
23 | + tdesc_add_flag (type_with_fields, 13, "CS"); | |
24 | + tdesc_add_flag (type_with_fields, 14, "BO"); | |
25 | + | |
26 | + tdesc_create_reg (feature, "r0", 0, 1, NULL, 32, "uint32"); | |
27 | + tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "uint32"); | |
28 | + tdesc_create_reg (feature, "r2", 2, 1, NULL, 32, "uint32"); | |
29 | + tdesc_create_reg (feature, "r3", 3, 1, NULL, 32, "uint32"); | |
30 | + tdesc_create_reg (feature, "r4", 4, 1, NULL, 32, "uint32"); | |
31 | + tdesc_create_reg (feature, "r5", 5, 1, NULL, 32, "uint32"); | |
32 | + tdesc_create_reg (feature, "r6", 6, 1, NULL, 32, "uint32"); | |
33 | + tdesc_create_reg (feature, "r7", 7, 1, NULL, 32, "uint32"); | |
34 | + tdesc_create_reg (feature, "r8", 8, 1, NULL, 32, "uint32"); | |
35 | + tdesc_create_reg (feature, "r9", 9, 1, NULL, 32, "uint32"); | |
36 | + tdesc_create_reg (feature, "r10", 10, 1, NULL, 32, "uint32"); | |
37 | + tdesc_create_reg (feature, "r11", 11, 1, NULL, 32, "uint32"); | |
38 | + tdesc_create_reg (feature, "r12", 12, 1, NULL, 32, "uint32"); | |
39 | + tdesc_create_reg (feature, "r13", 13, 1, NULL, 32, "uint32"); | |
40 | + tdesc_create_reg (feature, "r14", 14, 1, NULL, 32, "uint32"); | |
41 | + tdesc_create_reg (feature, "r15", 15, 1, NULL, 32, "data_ptr"); | |
42 | + tdesc_create_reg (feature, "pc", 16, 1, NULL, 32, "code_ptr"); | |
43 | + tdesc_create_reg (feature, "pr", 17, 1, NULL, 32, "code_ptr"); | |
44 | + tdesc_create_reg (feature, "gbr", 18, 1, NULL, 32, "data_ptr"); | |
45 | + tdesc_create_reg (feature, "vbr", 19, 1, NULL, 32, "data_ptr"); | |
46 | + tdesc_create_reg (feature, "mach", 20, 1, NULL, 32, "uint32"); | |
47 | + tdesc_create_reg (feature, "macl", 21, 1, NULL, 32, "uint32"); | |
48 | + tdesc_create_reg (feature, "sr", 22, 1, NULL, 32, "sr_flags"); | |
49 | + tdesc_create_reg (feature, "r0b", 42, 1, NULL, 32, "uint32"); | |
50 | + tdesc_create_reg (feature, "r1b", 43, 1, NULL, 32, "uint32"); | |
51 | + tdesc_create_reg (feature, "r2b", 44, 1, NULL, 32, "uint32"); | |
52 | + tdesc_create_reg (feature, "r3b", 45, 1, NULL, 32, "uint32"); | |
53 | + tdesc_create_reg (feature, "r4b", 46, 1, NULL, 32, "uint32"); | |
54 | + tdesc_create_reg (feature, "r5b", 47, 1, NULL, 32, "uint32"); | |
55 | + tdesc_create_reg (feature, "r6b", 48, 1, NULL, 32, "uint32"); | |
56 | + tdesc_create_reg (feature, "r7b", 49, 1, NULL, 32, "uint32"); | |
57 | + tdesc_create_reg (feature, "r8b", 50, 1, NULL, 32, "uint32"); | |
58 | + tdesc_create_reg (feature, "r9b", 51, 1, NULL, 32, "uint32"); | |
59 | + tdesc_create_reg (feature, "r10b", 52, 1, NULL, 32, "uint32"); | |
60 | + tdesc_create_reg (feature, "r11b", 53, 1, NULL, 32, "uint32"); | |
61 | + tdesc_create_reg (feature, "r12b", 54, 1, NULL, 32, "uint32"); | |
62 | + tdesc_create_reg (feature, "r13b", 55, 1, NULL, 32, "uint32"); | |
63 | + tdesc_create_reg (feature, "r14b", 56, 1, NULL, 32, "uint32"); | |
64 | + tdesc_create_reg (feature, "r15b", 57, 1, NULL, 32, "data_ptr"); | |
65 | + tdesc_create_reg (feature, "machb", 58, 1, NULL, 32, "uint32"); | |
66 | + tdesc_create_reg (feature, "ivnb", 59, 1, NULL, 32, "uint32"); | |
67 | + tdesc_create_reg (feature, "prb", 60, 1, NULL, 32, "code_ptr"); | |
68 | + tdesc_create_reg (feature, "gbrb", 61, 1, NULL, 32, "data_ptr"); | |
69 | + tdesc_create_reg (feature, "maclb", 62, 1, NULL, 32, "uint32"); | |
70 | + tdesc_create_reg (feature, "ibcr", 63, 1, NULL, 32, "uint32"); | |
71 | + tdesc_create_reg (feature, "ibnr", 64, 1, NULL, 32, "uint32"); | |
72 | + tdesc_create_reg (feature, "tbr", 65, 1, NULL, 32, "data_ptr"); | |
73 | + tdesc_create_reg (feature, "bank", 66, 1, NULL, 32, "uint32"); | |
74 | + | |
75 | + tdesc_sh2a_nofpu = result; | |
76 | +} |
@@ -0,0 +1,71 @@ | ||
1 | +<?xml version="1.0"?> | |
2 | +<!-- Copyright (C) 2019 Free Software Foundation, Inc. | |
3 | + | |
4 | + Copying and distribution of this file, with or without modification, | |
5 | + are permitted in any medium without royalty provided the copyright | |
6 | + notice and this notice are preserved. --> | |
7 | + | |
8 | +<!DOCTYPE feature SYSTEM "gdb-target.dtd"> | |
9 | +<feature name="org.gnu.gdb.sh.sh2a"> | |
10 | + <reg name="r0" bitsize="32" type="uint32"/> | |
11 | + <reg name="r1" bitsize="32" type="uint32"/> | |
12 | + <reg name="r2" bitsize="32" type="uint32"/> | |
13 | + <reg name="r3" bitsize="32" type="uint32"/> | |
14 | + <reg name="r4" bitsize="32" type="uint32"/> | |
15 | + <reg name="r5" bitsize="32" type="uint32"/> | |
16 | + <reg name="r6" bitsize="32" type="uint32"/> | |
17 | + <reg name="r7" bitsize="32" type="uint32"/> | |
18 | + <reg name="r8" bitsize="32" type="uint32"/> | |
19 | + <reg name="r9" bitsize="32" type="uint32"/> | |
20 | + <reg name="r10" bitsize="32" type="uint32"/> | |
21 | + <reg name="r11" bitsize="32" type="uint32"/> | |
22 | + <reg name="r12" bitsize="32" type="uint32"/> | |
23 | + <reg name="r13" bitsize="32" type="uint32"/> | |
24 | + <reg name="r14" bitsize="32" type="uint32"/> | |
25 | + <reg name="r15" bitsize="32" type="data_ptr"/> | |
26 | + | |
27 | + <reg name="pc" bitsize="32" type="code_ptr"/> | |
28 | + <reg name="pr" bitsize="32" type="code_ptr"/> | |
29 | + <reg name="gbr" bitsize="32" type="data_ptr"/> | |
30 | + <reg name="vbr" bitsize="32" type="data_ptr"/> | |
31 | + <reg name="mach" bitsize="32" type="uint32"/> | |
32 | + <reg name="macl" bitsize="32" type="uint32"/> | |
33 | + <flags id="sr_flags" size="4"> | |
34 | + <field name="T" start="0" end="0"/> | |
35 | + <field name="S" start="1" end="1"/> | |
36 | + <field name="I" start="4" end="7"/> | |
37 | + <field name="Q" start="8" end="8"/> | |
38 | + <field name="M" start="9" end="9"/> | |
39 | + <field name="CS" start="13" end="13"/> | |
40 | + <field name="BO" start="14" end="14"/> | |
41 | + </flags> | |
42 | + <reg name="sr" bitsize="32" type="sr_flags"/> | |
43 | + | |
44 | + <reg name="r0b" bitsize="32" type="uint32" regnum="42"/> | |
45 | + <reg name="r1b" bitsize="32" type="uint32"/> | |
46 | + <reg name="r2b" bitsize="32" type="uint32"/> | |
47 | + <reg name="r3b" bitsize="32" type="uint32"/> | |
48 | + <reg name="r4b" bitsize="32" type="uint32"/> | |
49 | + <reg name="r5b" bitsize="32" type="uint32"/> | |
50 | + <reg name="r6b" bitsize="32" type="uint32"/> | |
51 | + <reg name="r7b" bitsize="32" type="uint32"/> | |
52 | + <reg name="r8b" bitsize="32" type="uint32"/> | |
53 | + <reg name="r9b" bitsize="32" type="uint32"/> | |
54 | + <reg name="r10b" bitsize="32" type="uint32"/> | |
55 | + <reg name="r11b" bitsize="32" type="uint32"/> | |
56 | + <reg name="r12b" bitsize="32" type="uint32"/> | |
57 | + <reg name="r13b" bitsize="32" type="uint32"/> | |
58 | + <reg name="r14b" bitsize="32" type="uint32"/> | |
59 | + <reg name="r15b" bitsize="32" type="data_ptr"/> | |
60 | + <reg name="machb" bitsize="32" type="uint32"/> | |
61 | + <reg name="ivnb" bitsize="32" type="uint32"/> | |
62 | + <reg name="prb" bitsize="32" type="code_ptr"/> | |
63 | + <reg name="gbrb" bitsize="32" type="data_ptr"/> | |
64 | + <reg name="maclb" bitsize="32" type="uint32"/> | |
65 | + | |
66 | + <reg name="ibcr" bitsize="32" type="uint32"/> | |
67 | + <reg name="ibnr" bitsize="32" type="uint32"/> | |
68 | + <reg name="tbr" bitsize="32" type="data_ptr"/> | |
69 | + <reg name="bank" bitsize="32" type="uint32"/> | |
70 | + | |
71 | +</feature> |
@@ -0,0 +1,70 @@ | ||
1 | +/* THIS FILE IS GENERATED. -*- buffer-read-only: t -*- vi:set ro: | |
2 | + Original: sh3.xml.tmp */ | |
3 | + | |
4 | +#include "defs.h" | |
5 | +#include "osabi.h" | |
6 | +#include "target-descriptions.h" | |
7 | + | |
8 | +struct target_desc *tdesc_sh3; | |
9 | +static void | |
10 | +initialize_tdesc_sh3 (void) | |
11 | +{ | |
12 | + struct target_desc *result = allocate_target_description (); | |
13 | + struct tdesc_feature *feature; | |
14 | + | |
15 | + feature = tdesc_create_feature (result, "org.gnu.gdb.sh.sh3"); | |
16 | + tdesc_type_with_fields *type_with_fields; | |
17 | + type_with_fields = tdesc_create_flags (feature, "sr_flags", 4); | |
18 | + tdesc_add_flag (type_with_fields, 0, "T"); | |
19 | + tdesc_add_flag (type_with_fields, 1, "S"); | |
20 | + tdesc_add_bitfield (type_with_fields, "I", 4, 7); | |
21 | + tdesc_add_flag (type_with_fields, 8, "Q"); | |
22 | + tdesc_add_flag (type_with_fields, 9, "M"); | |
23 | + tdesc_add_flag (type_with_fields, 28, "BL"); | |
24 | + tdesc_add_flag (type_with_fields, 29, "RB"); | |
25 | + tdesc_add_flag (type_with_fields, 30, "MD"); | |
26 | + | |
27 | + tdesc_create_reg (feature, "r0", 0, 1, NULL, 32, "uint32"); | |
28 | + tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "uint32"); | |
29 | + tdesc_create_reg (feature, "r2", 2, 1, NULL, 32, "uint32"); | |
30 | + tdesc_create_reg (feature, "r3", 3, 1, NULL, 32, "uint32"); | |
31 | + tdesc_create_reg (feature, "r4", 4, 1, NULL, 32, "uint32"); | |
32 | + tdesc_create_reg (feature, "r5", 5, 1, NULL, 32, "uint32"); | |
33 | + tdesc_create_reg (feature, "r6", 6, 1, NULL, 32, "uint32"); | |
34 | + tdesc_create_reg (feature, "r7", 7, 1, NULL, 32, "uint32"); | |
35 | + tdesc_create_reg (feature, "r8", 8, 1, NULL, 32, "uint32"); | |
36 | + tdesc_create_reg (feature, "r9", 9, 1, NULL, 32, "uint32"); | |
37 | + tdesc_create_reg (feature, "r10", 10, 1, NULL, 32, "uint32"); | |
38 | + tdesc_create_reg (feature, "r11", 11, 1, NULL, 32, "uint32"); | |
39 | + tdesc_create_reg (feature, "r12", 12, 1, NULL, 32, "uint32"); | |
40 | + tdesc_create_reg (feature, "r13", 13, 1, NULL, 32, "uint32"); | |
41 | + tdesc_create_reg (feature, "r14", 14, 1, NULL, 32, "uint32"); | |
42 | + tdesc_create_reg (feature, "r15", 15, 1, NULL, 32, "data_ptr"); | |
43 | + tdesc_create_reg (feature, "pc", 16, 1, NULL, 32, "code_ptr"); | |
44 | + tdesc_create_reg (feature, "pr", 17, 1, NULL, 32, "code_ptr"); | |
45 | + tdesc_create_reg (feature, "gbr", 18, 1, NULL, 32, "data_ptr"); | |
46 | + tdesc_create_reg (feature, "vbr", 19, 1, NULL, 32, "data_ptr"); | |
47 | + tdesc_create_reg (feature, "mach", 20, 1, NULL, 32, "uint32"); | |
48 | + tdesc_create_reg (feature, "macl", 21, 1, NULL, 32, "uint32"); | |
49 | + tdesc_create_reg (feature, "sr", 22, 1, NULL, 32, "sr_flags"); | |
50 | + tdesc_create_reg (feature, "ssr", 40, 1, NULL, 32, "sr_flags"); | |
51 | + tdesc_create_reg (feature, "spc", 41, 1, NULL, 32, "code_ptr"); | |
52 | + tdesc_create_reg (feature, "r0b0", 42, 1, NULL, 32, "uint32"); | |
53 | + tdesc_create_reg (feature, "r1b0", 43, 1, NULL, 32, "uint32"); | |
54 | + tdesc_create_reg (feature, "r2b0", 44, 1, NULL, 32, "uint32"); | |
55 | + tdesc_create_reg (feature, "r3b0", 45, 1, NULL, 32, "uint32"); | |
56 | + tdesc_create_reg (feature, "r4b0", 46, 1, NULL, 32, "uint32"); | |
57 | + tdesc_create_reg (feature, "r5b0", 47, 1, NULL, 32, "uint32"); | |
58 | + tdesc_create_reg (feature, "r6b0", 48, 1, NULL, 32, "uint32"); | |
59 | + tdesc_create_reg (feature, "r7b0", 49, 1, NULL, 32, "uint32"); | |
60 | + tdesc_create_reg (feature, "r0b1", 50, 1, NULL, 32, "uint32"); | |
61 | + tdesc_create_reg (feature, "r1b1", 51, 1, NULL, 32, "uint32"); | |
62 | + tdesc_create_reg (feature, "r2b1", 52, 1, NULL, 32, "uint32"); | |
63 | + tdesc_create_reg (feature, "r3b1", 53, 1, NULL, 32, "uint32"); | |
64 | + tdesc_create_reg (feature, "r4b1", 54, 1, NULL, 32, "uint32"); | |
65 | + tdesc_create_reg (feature, "r5b1", 55, 1, NULL, 32, "uint32"); | |
66 | + tdesc_create_reg (feature, "r6b1", 56, 1, NULL, 32, "uint32"); | |
67 | + tdesc_create_reg (feature, "r7b1", 57, 1, NULL, 32, "uint32"); | |
68 | + | |
69 | + tdesc_sh3 = result; | |
70 | +} |
@@ -0,0 +1,63 @@ | ||
1 | +<?xml version="1.0"?> | |
2 | +<!-- Copyright (C) 2019 Free Software Foundation, Inc. | |
3 | + | |
4 | + Copying and distribution of this file, with or without modification, | |
5 | + are permitted in any medium without royalty provided the copyright | |
6 | + notice and this notice are preserved. --> | |
7 | + | |
8 | +<!DOCTYPE feature SYSTEM "gdb-target.dtd"> | |
9 | +<feature name="org.gnu.gdb.sh.sh3"> | |
10 | + <reg name="r0" bitsize="32" type="uint32"/> | |
11 | + <reg name="r1" bitsize="32" type="uint32"/> | |
12 | + <reg name="r2" bitsize="32" type="uint32"/> | |
13 | + <reg name="r3" bitsize="32" type="uint32"/> | |
14 | + <reg name="r4" bitsize="32" type="uint32"/> | |
15 | + <reg name="r5" bitsize="32" type="uint32"/> | |
16 | + <reg name="r6" bitsize="32" type="uint32"/> | |
17 | + <reg name="r7" bitsize="32" type="uint32"/> | |
18 | + <reg name="r8" bitsize="32" type="uint32"/> | |
19 | + <reg name="r9" bitsize="32" type="uint32"/> | |
20 | + <reg name="r10" bitsize="32" type="uint32"/> | |
21 | + <reg name="r11" bitsize="32" type="uint32"/> | |
22 | + <reg name="r12" bitsize="32" type="uint32"/> | |
23 | + <reg name="r13" bitsize="32" type="uint32"/> | |
24 | + <reg name="r14" bitsize="32" type="uint32"/> | |
25 | + <reg name="r15" bitsize="32" type="data_ptr"/> | |
26 | + | |
27 | + <reg name="pc" bitsize="32" type="code_ptr"/> | |
28 | + <reg name="pr" bitsize="32" type="code_ptr"/> | |
29 | + <reg name="gbr" bitsize="32" type="data_ptr"/> | |
30 | + <reg name="vbr" bitsize="32" type="data_ptr"/> | |
31 | + <reg name="mach" bitsize="32" type="uint32"/> | |
32 | + <reg name="macl" bitsize="32" type="uint32"/> | |
33 | + <flags id="sr_flags" size="4"> | |
34 | + <field name="T" start="0" end="0"/> | |
35 | + <field name="S" start="1" end="1"/> | |
36 | + <field name="I" start="4" end="7"/> | |
37 | + <field name="Q" start="8" end="8"/> | |
38 | + <field name="M" start="9" end="9"/> | |
39 | + <field name="BL" start="28" end="28"/> | |
40 | + <field name="RB" start="29" end="29"/> | |
41 | + <field name="MD" start="30" end="30"/> | |
42 | + </flags> | |
43 | + <reg name="sr" bitsize="32" type="sr_flags"/> | |
44 | + | |
45 | + <reg name="ssr" bitsize="32" type="sr_flags" regnum="40"/> | |
46 | + <reg name="spc" bitsize="32" type="code_ptr"/> | |
47 | + <reg name="r0b0" bitsize="32" type="uint32"/> | |
48 | + <reg name="r1b0" bitsize="32" type="uint32"/> | |
49 | + <reg name="r2b0" bitsize="32" type="uint32"/> | |
50 | + <reg name="r3b0" bitsize="32" type="uint32"/> | |
51 | + <reg name="r4b0" bitsize="32" type="uint32"/> | |
52 | + <reg name="r5b0" bitsize="32" type="uint32"/> | |
53 | + <reg name="r6b0" bitsize="32" type="uint32"/> | |
54 | + <reg name="r7b0" bitsize="32" type="uint32"/> | |
55 | + <reg name="r0b1" bitsize="32" type="uint32"/> | |
56 | + <reg name="r1b1" bitsize="32" type="uint32"/> | |
57 | + <reg name="r2b1" bitsize="32" type="uint32"/> | |
58 | + <reg name="r3b1" bitsize="32" type="uint32"/> | |
59 | + <reg name="r4b1" bitsize="32" type="uint32"/> | |
60 | + <reg name="r5b1" bitsize="32" type="uint32"/> | |
61 | + <reg name="r6b1" bitsize="32" type="uint32"/> | |
62 | + <reg name="r7b1" bitsize="32" type="uint32"/> | |
63 | +</feature> |
@@ -0,0 +1,34 @@ | ||
1 | +/* THIS FILE IS GENERATED. -*- buffer-read-only: t -*- vi:set ro: | |
2 | + Original: sh4-dfp.xml.tmp */ | |
3 | + | |
4 | +#include "defs.h" | |
5 | +#include "osabi.h" | |
6 | +#include "target-descriptions.h" | |
7 | + | |
8 | +struct target_desc *tdesc_sh4_dfp; | |
9 | +static void | |
10 | +initialize_tdesc_sh4_dfp (void) | |
11 | +{ | |
12 | + struct target_desc *result = allocate_target_description (); | |
13 | + struct tdesc_feature *feature; | |
14 | + | |
15 | + feature = tdesc_create_feature (result, "org.gnu.gdb.sh.dfpu"); | |
16 | + tdesc_type *element_type; | |
17 | + element_type = tdesc_named_type (feature, "ieee_single"); | |
18 | + tdesc_create_vector (feature, "v4f", element_type, 4); | |
19 | + | |
20 | + tdesc_create_reg (feature, "dr0", 68, 1, NULL, 64, "ieee_double"); | |
21 | + tdesc_create_reg (feature, "dr2", 69, 1, NULL, 64, "ieee_double"); | |
22 | + tdesc_create_reg (feature, "dr4", 70, 1, NULL, 64, "ieee_double"); | |
23 | + tdesc_create_reg (feature, "dr6", 71, 1, NULL, 64, "ieee_double"); | |
24 | + tdesc_create_reg (feature, "dr8", 72, 1, NULL, 64, "ieee_double"); | |
25 | + tdesc_create_reg (feature, "dr10", 73, 1, NULL, 64, "ieee_double"); | |
26 | + tdesc_create_reg (feature, "dr12", 74, 1, NULL, 64, "ieee_double"); | |
27 | + tdesc_create_reg (feature, "dr14", 75, 1, NULL, 64, "ieee_double"); | |
28 | + tdesc_create_reg (feature, "fv0", 76, 1, NULL, 128, "v4f"); | |
29 | + tdesc_create_reg (feature, "fv4", 77, 1, NULL, 128, "v4f"); | |
30 | + tdesc_create_reg (feature, "fv8", 78, 1, NULL, 128, "v4f"); | |
31 | + tdesc_create_reg (feature, "fv12", 79, 1, NULL, 128, "v4f"); | |
32 | + | |
33 | + tdesc_sh4_dfp = result; | |
34 | +} |
@@ -0,0 +1,24 @@ | ||
1 | +<?xml version="1.0"?> | |
2 | +<!-- Copyright (C) 2019 Free Software Foundation, Inc. | |
3 | + | |
4 | + Copying and distribution of this file, with or without modification, | |
5 | + are permitted in any medium without royalty provided the copyright | |
6 | + notice and this notice are preserved. --> | |
7 | + | |
8 | +<!DOCTYPE feature SYSTEM "gdb-target.dtd"> | |
9 | +<feature name="org.gnu.gdb.sh.dfpu"> | |
10 | + <reg name="dr0" bitsize="64" type="ieee_double" regnum="68"/> | |
11 | + <reg name="dr2" bitsize="64" type="ieee_double"/> | |
12 | + <reg name="dr4" bitsize="64" type="ieee_double"/> | |
13 | + <reg name="dr6" bitsize="64" type="ieee_double"/> | |
14 | + <reg name="dr8" bitsize="64" type="ieee_double"/> | |
15 | + <reg name="dr10" bitsize="64" type="ieee_double"/> | |
16 | + <reg name="dr12" bitsize="64" type="ieee_double"/> | |
17 | + <reg name="dr14" bitsize="64" type="ieee_double"/> | |
18 | + | |
19 | + <vector id="v4f" type="ieee_single" count="4" regnum="76"/> | |
20 | + <reg name="fv0" bitsize="128" type="v4f"/> | |
21 | + <reg name="fv4" bitsize="128" type="v4f"/> | |
22 | + <reg name="fv8" bitsize="128" type="v4f"/> | |
23 | + <reg name="fv12" bitsize="128" type="v4f"/> | |
24 | +</feature> |
@@ -0,0 +1,26 @@ | ||
1 | +/* THIS FILE IS GENERATED. -*- buffer-read-only: t -*- vi:set ro: | |
2 | + Original: sh4-vfp.xml.tmp */ | |
3 | + | |
4 | +#include "defs.h" | |
5 | +#include "osabi.h" | |
6 | +#include "target-descriptions.h" | |
7 | + | |
8 | +struct target_desc *tdesc_sh4_vfp; | |
9 | +static void | |
10 | +initialize_tdesc_sh4_vfp (void) | |
11 | +{ | |
12 | + struct target_desc *result = allocate_target_description (); | |
13 | + struct tdesc_feature *feature; | |
14 | + | |
15 | + feature = tdesc_create_feature (result, "org.gnu.gdb.sh.vfp"); | |
16 | + tdesc_type *element_type; | |
17 | + element_type = tdesc_named_type (feature, "ieee_single"); | |
18 | + tdesc_create_vector (feature, "v4f", element_type, 4); | |
19 | + | |
20 | + tdesc_create_reg (feature, "fv0", 0, 1, NULL, 128, "v4f"); | |
21 | + tdesc_create_reg (feature, "fv4", 1, 1, NULL, 128, "v4f"); | |
22 | + tdesc_create_reg (feature, "fv8", 2, 1, NULL, 128, "v4f"); | |
23 | + tdesc_create_reg (feature, "fv12", 3, 1, NULL, 128, "v4f"); | |
24 | + | |
25 | + tdesc_sh4_vfp = result; | |
26 | +} |
@@ -0,0 +1,15 @@ | ||
1 | +<?xml version="1.0"?> | |
2 | +<!-- Copyright (C) 2019 Free Software Foundation, Inc. | |
3 | + | |
4 | + Copying and distribution of this file, with or without modification, | |
5 | + are permitted in any medium without royalty provided the copyright | |
6 | + notice and this notice are preserved. --> | |
7 | + | |
8 | +<!DOCTYPE feature SYSTEM "gdb-target.dtd"> | |
9 | +<feature name="org.gnu.gdb.sh.vfp"> | |
10 | + <vector id="v4f" type="ieee_single" count="4" regnum="76"/> | |
11 | + <reg name="fv0" bitsize="128" type="v4f"/> | |
12 | + <reg name="fv4" bitsize="128" type="v4f"/> | |
13 | + <reg name="fv8" bitsize="128" type="v4f"/> | |
14 | + <reg name="fv12" bitsize="128" type="v4f"/> | |
15 | +</feature> |
@@ -39,6 +39,7 @@ | ||
39 | 39 | #include "reggroups.h" |
40 | 40 | #include "regset.h" |
41 | 41 | #include "objfiles.h" |
42 | +#include "target-descriptions.h" | |
42 | 43 | |
43 | 44 | #include "sh-tdep.h" |
44 | 45 |
@@ -52,6 +53,15 @@ | ||
52 | 53 | #include "gdb/sim-sh.h" |
53 | 54 | #include <algorithm> |
54 | 55 | |
56 | +#include "features/sh/sh.c" | |
57 | +#include "features/sh/sh-fpu.c" | |
58 | +#include "features/sh/sh-dsp.c" | |
59 | +#include "features/sh/sh2a-fpu.c" | |
60 | +#include "features/sh/sh2a-nofpu.c" | |
61 | +#include "features/sh/sh3.c" | |
62 | +#include "features/sh/sh4-dfp.c" | |
63 | +#include "features/sh/sh4-vfp.c" | |
64 | + | |
55 | 65 | /* List of "set sh ..." and "show sh ..." commands. */ |
56 | 66 | static struct cmd_list_element *setshcmdlist = NULL; |
57 | 67 | static struct cmd_list_element *showshcmdlist = NULL; |
@@ -106,316 +116,6 @@ sh_is_renesas_calling_convention (struct type *func_type) | ||
106 | 116 | return val; |
107 | 117 | } |
108 | 118 | |
109 | -static const char * | |
110 | -sh_sh_register_name (struct gdbarch *gdbarch, int reg_nr) | |
111 | -{ | |
112 | - static const char *register_names[] = { | |
113 | - "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", | |
114 | - "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", | |
115 | - "pc", "pr", "gbr", "vbr", "mach", "macl", "sr", | |
116 | - "", "", | |
117 | - "", "", "", "", "", "", "", "", | |
118 | - "", "", "", "", "", "", "", "", | |
119 | - "", "", | |
120 | - "", "", "", "", "", "", "", "", | |
121 | - "", "", "", "", "", "", "", "", | |
122 | - "", "", "", "", "", "", "", "", | |
123 | - }; | |
124 | - if (reg_nr < 0) | |
125 | - return NULL; | |
126 | - if (reg_nr >= (sizeof (register_names) / sizeof (*register_names))) | |
127 | - return NULL; | |
128 | - return register_names[reg_nr]; | |
129 | -} | |
130 | - | |
131 | -static const char * | |
132 | -sh_sh3_register_name (struct gdbarch *gdbarch, int reg_nr) | |
133 | -{ | |
134 | - static const char *register_names[] = { | |
135 | - "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", | |
136 | - "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", | |
137 | - "pc", "pr", "gbr", "vbr", "mach", "macl", "sr", | |
138 | - "", "", | |
139 | - "", "", "", "", "", "", "", "", | |
140 | - "", "", "", "", "", "", "", "", | |
141 | - "ssr", "spc", | |
142 | - "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0", | |
143 | - "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1" | |
144 | - "", "", "", "", "", "", "", "", | |
145 | - }; | |
146 | - if (reg_nr < 0) | |
147 | - return NULL; | |
148 | - if (reg_nr >= (sizeof (register_names) / sizeof (*register_names))) | |
149 | - return NULL; | |
150 | - return register_names[reg_nr]; | |
151 | -} | |
152 | - | |
153 | -static const char * | |
154 | -sh_sh3e_register_name (struct gdbarch *gdbarch, int reg_nr) | |
155 | -{ | |
156 | - static const char *register_names[] = { | |
157 | - "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", | |
158 | - "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", | |
159 | - "pc", "pr", "gbr", "vbr", "mach", "macl", "sr", | |
160 | - "fpul", "fpscr", | |
161 | - "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7", | |
162 | - "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15", | |
163 | - "ssr", "spc", | |
164 | - "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0", | |
165 | - "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1", | |
166 | - "", "", "", "", "", "", "", "", | |
167 | - }; | |
168 | - if (reg_nr < 0) | |
169 | - return NULL; | |
170 | - if (reg_nr >= (sizeof (register_names) / sizeof (*register_names))) | |
171 | - return NULL; | |
172 | - return register_names[reg_nr]; | |
173 | -} | |
174 | - | |
175 | -static const char * | |
176 | -sh_sh2e_register_name (struct gdbarch *gdbarch, int reg_nr) | |
177 | -{ | |
178 | - static const char *register_names[] = { | |
179 | - "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", | |
180 | - "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", | |
181 | - "pc", "pr", "gbr", "vbr", "mach", "macl", "sr", | |
182 | - "fpul", "fpscr", | |
183 | - "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7", | |
184 | - "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15", | |
185 | - "", "", | |
186 | - "", "", "", "", "", "", "", "", | |
187 | - "", "", "", "", "", "", "", "", | |
188 | - "", "", "", "", "", "", "", "", | |
189 | - }; | |
190 | - if (reg_nr < 0) | |
191 | - return NULL; | |
192 | - if (reg_nr >= (sizeof (register_names) / sizeof (*register_names))) | |
193 | - return NULL; | |
194 | - return register_names[reg_nr]; | |
195 | -} | |
196 | - | |
197 | -static const char * | |
198 | -sh_sh2a_register_name (struct gdbarch *gdbarch, int reg_nr) | |
199 | -{ | |
200 | - static const char *register_names[] = { | |
201 | - /* general registers 0-15 */ | |
202 | - "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", | |
203 | - "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", | |
204 | - /* 16 - 22 */ | |
205 | - "pc", "pr", "gbr", "vbr", "mach", "macl", "sr", | |
206 | - /* 23, 24 */ | |
207 | - "fpul", "fpscr", | |
208 | - /* floating point registers 25 - 40 */ | |
209 | - "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7", | |
210 | - "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15", | |
211 | - /* 41, 42 */ | |
212 | - "", "", | |
213 | - /* 43 - 62. Banked registers. The bank number used is determined by | |
214 | - the bank register (63). */ | |
215 | - "r0b", "r1b", "r2b", "r3b", "r4b", "r5b", "r6b", "r7b", | |
216 | - "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", | |
217 | - "machb", "ivnb", "prb", "gbrb", "maclb", | |
218 | - /* 63: register bank number, not a real register but used to | |
219 | - communicate the register bank currently get/set. This register | |
220 | - is hidden to the user, who manipulates it using the pseudo | |
221 | - register called "bank" (67). See below. */ | |
222 | - "", | |
223 | - /* 64 - 66 */ | |
224 | - "ibcr", "ibnr", "tbr", | |
225 | - /* 67: register bank number, the user visible pseudo register. */ | |
226 | - "bank", | |
227 | - /* double precision (pseudo) 68 - 75 */ | |
228 | - "dr0", "dr2", "dr4", "dr6", "dr8", "dr10", "dr12", "dr14", | |
229 | - }; | |
230 | - if (reg_nr < 0) | |
231 | - return NULL; | |
232 | - if (reg_nr >= (sizeof (register_names) / sizeof (*register_names))) | |
233 | - return NULL; | |
234 | - return register_names[reg_nr]; | |
235 | -} | |
236 | - | |
237 | -static const char * | |
238 | -sh_sh2a_nofpu_register_name (struct gdbarch *gdbarch, int reg_nr) | |
239 | -{ | |
240 | - static const char *register_names[] = { | |
241 | - /* general registers 0-15 */ | |
242 | - "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", | |
243 | - "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", | |
244 | - /* 16 - 22 */ | |
245 | - "pc", "pr", "gbr", "vbr", "mach", "macl", "sr", | |
246 | - /* 23, 24 */ | |
247 | - "", "", | |
248 | - /* floating point registers 25 - 40 */ | |
249 | - "", "", "", "", "", "", "", "", | |
250 | - "", "", "", "", "", "", "", "", | |
251 | - /* 41, 42 */ | |
252 | - "", "", | |
253 | - /* 43 - 62. Banked registers. The bank number used is determined by | |
254 | - the bank register (63). */ | |
255 | - "r0b", "r1b", "r2b", "r3b", "r4b", "r5b", "r6b", "r7b", | |
256 | - "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", | |
257 | - "machb", "ivnb", "prb", "gbrb", "maclb", | |
258 | - /* 63: register bank number, not a real register but used to | |
259 | - communicate the register bank currently get/set. This register | |
260 | - is hidden to the user, who manipulates it using the pseudo | |
261 | - register called "bank" (67). See below. */ | |
262 | - "", | |
263 | - /* 64 - 66 */ | |
264 | - "ibcr", "ibnr", "tbr", | |
265 | - /* 67: register bank number, the user visible pseudo register. */ | |
266 | - "bank", | |
267 | - /* double precision (pseudo) 68 - 75 */ | |
268 | - "", "", "", "", "", "", "", "", | |
269 | - }; | |
270 | - if (reg_nr < 0) | |
271 | - return NULL; | |
272 | - if (reg_nr >= (sizeof (register_names) / sizeof (*register_names))) | |
273 | - return NULL; | |
274 | - return register_names[reg_nr]; | |
275 | -} | |
276 | - | |
277 | -static const char * | |
278 | -sh_sh_dsp_register_name (struct gdbarch *gdbarch, int reg_nr) | |
279 | -{ | |
280 | - static const char *register_names[] = { | |
281 | - "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", | |
282 | - "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", | |
283 | - "pc", "pr", "gbr", "vbr", "mach", "macl", "sr", | |
284 | - "", "dsr", | |
285 | - "a0g", "a0", "a1g", "a1", "m0", "m1", "x0", "x1", | |
286 | - "y0", "y1", "", "", "", "", "", "mod", | |
287 | - "", "", | |
288 | - "rs", "re", "", "", "", "", "", "", | |
289 | - "", "", "", "", "", "", "", "", | |
290 | - "", "", "", "", "", "", "", "", | |
291 | - }; | |
292 | - if (reg_nr < 0) | |
293 | - return NULL; | |
294 | - if (reg_nr >= (sizeof (register_names) / sizeof (*register_names))) | |
295 | - return NULL; | |
296 | - return register_names[reg_nr]; | |
297 | -} | |
298 | - | |
299 | -static const char * | |
300 | -sh_sh3_dsp_register_name (struct gdbarch *gdbarch, int reg_nr) | |
301 | -{ | |
302 | - static const char *register_names[] = { | |
303 | - "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", | |
304 | - "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", | |
305 | - "pc", "pr", "gbr", "vbr", "mach", "macl", "sr", | |
306 | - "", "dsr", | |
307 | - "a0g", "a0", "a1g", "a1", "m0", "m1", "x0", "x1", | |
308 | - "y0", "y1", "", "", "", "", "", "mod", | |
309 | - "ssr", "spc", | |
310 | - "rs", "re", "", "", "", "", "", "", | |
311 | - "r0b", "r1b", "r2b", "r3b", "r4b", "r5b", "r6b", "r7b", | |
312 | - "", "", "", "", "", "", "", "", | |
313 | - "", "", "", "", "", "", "", "", | |
314 | - }; | |
315 | - if (reg_nr < 0) | |
316 | - return NULL; | |
317 | - if (reg_nr >= (sizeof (register_names) / sizeof (*register_names))) | |
318 | - return NULL; | |
319 | - return register_names[reg_nr]; | |
320 | -} | |
321 | - | |
322 | -static const char * | |
323 | -sh_sh4_register_name (struct gdbarch *gdbarch, int reg_nr) | |
324 | -{ | |
325 | - static const char *register_names[] = { | |
326 | - /* general registers 0-15 */ | |
327 | - "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", | |
328 | - "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", | |
329 | - /* 16 - 22 */ | |
330 | - "pc", "pr", "gbr", "vbr", "mach", "macl", "sr", | |
331 | - /* 23, 24 */ | |
332 | - "fpul", "fpscr", | |
333 | - /* floating point registers 25 - 40 */ | |
334 | - "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7", | |
335 | - "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15", | |
336 | - /* 41, 42 */ | |
337 | - "ssr", "spc", | |
338 | - /* bank 0 43 - 50 */ | |
339 | - "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0", | |
340 | - /* bank 1 51 - 58 */ | |
341 | - "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1", | |
342 | - /* 59 - 66 */ | |
343 | - "", "", "", "", "", "", "", "", | |
344 | - /* pseudo bank register. */ | |
345 | - "", | |
346 | - /* double precision (pseudo) 68 - 75 */ | |
347 | - "dr0", "dr2", "dr4", "dr6", "dr8", "dr10", "dr12", "dr14", | |
348 | - /* vectors (pseudo) 76 - 79 */ | |
349 | - "fv0", "fv4", "fv8", "fv12", | |
350 | - /* FIXME: missing XF */ | |
351 | - /* FIXME: missing XD */ | |
352 | - }; | |
353 | - if (reg_nr < 0) | |
354 | - return NULL; | |
355 | - if (reg_nr >= (sizeof (register_names) / sizeof (*register_names))) | |
356 | - return NULL; | |
357 | - return register_names[reg_nr]; | |
358 | -} | |
359 | - | |
360 | -static const char * | |
361 | -sh_sh4_nofpu_register_name (struct gdbarch *gdbarch, int reg_nr) | |
362 | -{ | |
363 | - static const char *register_names[] = { | |
364 | - /* general registers 0-15 */ | |
365 | - "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", | |
366 | - "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", | |
367 | - /* 16 - 22 */ | |
368 | - "pc", "pr", "gbr", "vbr", "mach", "macl", "sr", | |
369 | - /* 23, 24 */ | |
370 | - "", "", | |
371 | - /* floating point registers 25 - 40 -- not for nofpu target */ | |
372 | - "", "", "", "", "", "", "", "", | |
373 | - "", "", "", "", "", "", "", "", | |
374 | - /* 41, 42 */ | |
375 | - "ssr", "spc", | |
376 | - /* bank 0 43 - 50 */ | |
377 | - "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0", | |
378 | - /* bank 1 51 - 58 */ | |
379 | - "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1", | |
380 | - /* 59 - 66 */ | |
381 | - "", "", "", "", "", "", "", "", | |
382 | - /* pseudo bank register. */ | |
383 | - "", | |
384 | - /* double precision (pseudo) 68 - 75 -- not for nofpu target */ | |
385 | - "", "", "", "", "", "", "", "", | |
386 | - /* vectors (pseudo) 76 - 79 -- not for nofpu target */ | |
387 | - "", "", "", "", | |
388 | - }; | |
389 | - if (reg_nr < 0) | |
390 | - return NULL; | |
391 | - if (reg_nr >= (sizeof (register_names) / sizeof (*register_names))) | |
392 | - return NULL; | |
393 | - return register_names[reg_nr]; | |
394 | -} | |
395 | - | |
396 | -static const char * | |
397 | -sh_sh4al_dsp_register_name (struct gdbarch *gdbarch, int reg_nr) | |
398 | -{ | |
399 | - static const char *register_names[] = { | |
400 | - "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", | |
401 | - "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", | |
402 | - "pc", "pr", "gbr", "vbr", "mach", "macl", "sr", | |
403 | - "", "dsr", | |
404 | - "a0g", "a0", "a1g", "a1", "m0", "m1", "x0", "x1", | |
405 | - "y0", "y1", "", "", "", "", "", "mod", | |
406 | - "ssr", "spc", | |
407 | - "rs", "re", "", "", "", "", "", "", | |
408 | - "r0b", "r1b", "r2b", "r3b", "r4b", "r5b", "r6b", "r7b", | |
409 | - "", "", "", "", "", "", "", "", | |
410 | - "", "", "", "", "", "", "", "", | |
411 | - }; | |
412 | - if (reg_nr < 0) | |
413 | - return NULL; | |
414 | - if (reg_nr >= (sizeof (register_names) / sizeof (*register_names))) | |
415 | - return NULL; | |
416 | - return register_names[reg_nr]; | |
417 | -} | |
418 | - | |
419 | 119 | /* Implement the breakpoint_kind_from_pc gdbarch method. */ |
420 | 120 | |
421 | 121 | static int |
@@ -1434,30 +1134,6 @@ sh_return_value_fpu (struct gdbarch *gdbarch, struct value *function, | ||
1434 | 1134 | } |
1435 | 1135 | |
1436 | 1136 | static struct type * |
1437 | -sh_sh2a_register_type (struct gdbarch *gdbarch, int reg_nr) | |
1438 | -{ | |
1439 | - if ((reg_nr >= gdbarch_fp0_regnum (gdbarch) | |
1440 | - && (reg_nr <= FP_LAST_REGNUM)) || (reg_nr == FPUL_REGNUM)) | |
1441 | - return builtin_type (gdbarch)->builtin_float; | |
1442 | - else if (reg_nr >= DR0_REGNUM && reg_nr <= DR_LAST_REGNUM) | |
1443 | - return builtin_type (gdbarch)->builtin_double; | |
1444 | - else | |
1445 | - return builtin_type (gdbarch)->builtin_int; | |
1446 | -} | |
1447 | - | |
1448 | -/* Return the GDB type object for the "standard" data type | |
1449 | - of data in register N. */ | |
1450 | -static struct type * | |
1451 | -sh_sh3e_register_type (struct gdbarch *gdbarch, int reg_nr) | |
1452 | -{ | |
1453 | - if ((reg_nr >= gdbarch_fp0_regnum (gdbarch) | |
1454 | - && (reg_nr <= FP_LAST_REGNUM)) || (reg_nr == FPUL_REGNUM)) | |
1455 | - return builtin_type (gdbarch)->builtin_float; | |
1456 | - else | |
1457 | - return builtin_type (gdbarch)->builtin_int; | |
1458 | -} | |
1459 | - | |
1460 | -static struct type * | |
1461 | 1137 | sh_sh4_build_float_register_type (struct gdbarch *gdbarch, int high) |
1462 | 1138 | { |
1463 | 1139 | return lookup_array_range_type (builtin_type (gdbarch)->builtin_float, |
@@ -1465,24 +1141,33 @@ sh_sh4_build_float_register_type (struct gdbarch *gdbarch, int high) | ||
1465 | 1141 | } |
1466 | 1142 | |
1467 | 1143 | static struct type * |
1468 | -sh_sh4_register_type (struct gdbarch *gdbarch, int reg_nr) | |
1144 | +sh_register_type (struct gdbarch *gdbarch, int reg_nr) | |
1469 | 1145 | { |
1470 | - if ((reg_nr >= gdbarch_fp0_regnum (gdbarch) | |
1471 | - && (reg_nr <= FP_LAST_REGNUM)) || (reg_nr == FPUL_REGNUM)) | |
1472 | - return builtin_type (gdbarch)->builtin_float; | |
1473 | - else if (reg_nr >= DR0_REGNUM && reg_nr <= DR_LAST_REGNUM) | |
1146 | + struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
1147 | + if (reg_nr < 25) | |
1148 | + { | |
1149 | + /* r0-r15 / control / fp status */ | |
1150 | + return builtin_type (gdbarch)->builtin_int; | |
1151 | + } | |
1152 | + else if (reg_nr < 41) | |
1153 | + { | |
1154 | + if (tdep->have_fpu) | |
1155 | + return builtin_type (gdbarch)->builtin_float; | |
1156 | + else | |
1157 | + /* DSP */ | |
1158 | + return builtin_type (gdbarch)->builtin_int; | |
1159 | + } | |
1160 | + else if (reg_nr < 68) | |
1161 | + /* SH2a/SH3/4 register bank */ | |
1162 | + return builtin_type (gdbarch)->builtin_int; | |
1163 | + else if (reg_nr < 75) | |
1164 | + /* SH2a/SH4 double */ | |
1474 | 1165 | return builtin_type (gdbarch)->builtin_double; |
1475 | - else if (reg_nr >= FV0_REGNUM && reg_nr <= FV_LAST_REGNUM) | |
1476 | - return sh_sh4_build_float_register_type (gdbarch, 3); | |
1477 | 1166 | else |
1478 | - return builtin_type (gdbarch)->builtin_int; | |
1167 | + /* SH4 vector */ | |
1168 | + return sh_sh4_build_float_register_type (gdbarch, 3); | |
1479 | 1169 | } |
1480 | 1170 | |
1481 | -static struct type * | |
1482 | -sh_default_register_type (struct gdbarch *gdbarch, int reg_nr) | |
1483 | -{ | |
1484 | - return builtin_type (gdbarch)->builtin_int; | |
1485 | -} | |
1486 | 1171 | |
1487 | 1172 | /* Is a register in a reggroup? |
1488 | 1173 | The default code in reggroup.c doesn't identify system registers, some |
@@ -2231,172 +1916,285 @@ sh_return_in_first_hidden_param_p (struct gdbarch *gdbarch, | ||
2231 | 1916 | |
2232 | 1917 | |
2233 | 1918 | |
1919 | +static const char *sh_register_names[] = { | |
1920 | + "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", | |
1921 | + "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", | |
1922 | + "pc", "pr", "gbr", "vbr", "mach", "macl", "sr", | |
1923 | +}; | |
1924 | + | |
1925 | +static const char *sh2a_register_names[] = { | |
1926 | + "r0b", "r1b", "r2b", "r3b", "r4b", "r5b", "r6b", "r7b", | |
1927 | + "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", | |
1928 | + "machb", "ivnb", "prb", "gbrb", "maclb", | |
1929 | + "", "ibcr", "ibnr", "tbr", | |
1930 | + "bank", | |
1931 | +}; | |
1932 | + | |
1933 | +static const char *sh3_register_names[] = { | |
1934 | + "ssr", "spc", | |
1935 | + "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0", | |
1936 | + "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1", | |
1937 | +}; | |
1938 | + | |
1939 | +static const char *sh_fpregister_names[] = { | |
1940 | + "fpul", "fpscr", | |
1941 | + "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7", | |
1942 | + "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15", | |
1943 | +}; | |
1944 | + | |
1945 | +static const char *sh_dspregister_names[] = { | |
1946 | + "", "dsr", | |
1947 | + "a0g", "a0", "a1g", "a1", "m0", "m1", "x0", "x1", | |
1948 | + "y0", "y1", "", "", "", "", "", "mod", | |
1949 | + "ssr", "spc", | |
1950 | + "rs", "re", "", "", "", "", "", "", | |
1951 | +}; | |
1952 | + | |
1953 | +static const char *sh_drregister_names[] = { | |
1954 | + "dr0", "dr2", "dr4", "dr6", "dr8", "dr10", "dr12", "dr14", | |
1955 | +}; | |
1956 | + | |
1957 | +static const char *sh_vfregister_names[] = { | |
1958 | + "fv0", "fv4", "fv8", "fv12", | |
1959 | +}; | |
1960 | + | |
2234 | 1961 | static struct gdbarch * |
2235 | 1962 | sh_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) |
2236 | 1963 | { |
2237 | 1964 | struct gdbarch *gdbarch; |
2238 | 1965 | struct gdbarch_tdep *tdep; |
1966 | + struct gdbarch_list *best_arch; | |
1967 | + struct tdesc_arch_data *tdesc_data = NULL; | |
1968 | + const struct target_desc *tdesc = info.target_desc; | |
1969 | + int i; | |
1970 | + enum sh_flavour flavour = sh_no_flavour; | |
1971 | + int has_fp = 0; | |
1972 | + int has_dsp = 0; | |
1973 | + int has_dfp_pseudos = 0; | |
1974 | + int has_vfp_pseudos = 0; | |
1975 | + int num_pseudos = 0; | |
1976 | + | |
1977 | + if (tdesc == NULL) | |
1978 | + { | |
1979 | + tdesc = tdesc_sh; | |
1980 | + } | |
2239 | 1981 | |
2240 | - /* If there is already a candidate, use it. */ | |
2241 | - arches = gdbarch_list_lookup_by_info (arches, &info); | |
2242 | - if (arches != NULL) | |
2243 | - return arches->gdbarch; | |
2244 | - | |
2245 | - /* None found, create a new architecture from the information | |
2246 | - provided. */ | |
2247 | - tdep = XCNEW (struct gdbarch_tdep); | |
2248 | - gdbarch = gdbarch_alloc (&info, tdep); | |
2249 | - | |
2250 | - set_gdbarch_short_bit (gdbarch, 2 * TARGET_CHAR_BIT); | |
2251 | - set_gdbarch_int_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
2252 | - set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
2253 | - set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT); | |
2254 | - | |
2255 | - set_gdbarch_wchar_bit (gdbarch, 2 * TARGET_CHAR_BIT); | |
2256 | - set_gdbarch_wchar_signed (gdbarch, 0); | |
1982 | + /* Check any target description for validity. */ | |
1983 | + if (tdesc_has_registers (tdesc)) | |
1984 | + { | |
1985 | + const struct tdesc_feature *feature; | |
1986 | + int valid_p; | |
2257 | 1987 | |
2258 | - set_gdbarch_float_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
2259 | - set_gdbarch_double_bit (gdbarch, 8 * TARGET_CHAR_BIT); | |
2260 | - set_gdbarch_long_double_bit (gdbarch, 8 * TARGET_CHAR_BIT); | |
2261 | - set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
1988 | + feature = tdesc_find_feature (tdesc, "org.gnu.gdb.sh.core"); | |
2262 | 1989 | |
2263 | - set_gdbarch_num_regs (gdbarch, SH_NUM_REGS); | |
2264 | - set_gdbarch_sp_regnum (gdbarch, 15); | |
2265 | - set_gdbarch_pc_regnum (gdbarch, 16); | |
2266 | - set_gdbarch_fp0_regnum (gdbarch, -1); | |
2267 | - set_gdbarch_num_pseudo_regs (gdbarch, 0); | |
1990 | + if (feature == NULL) | |
1991 | + { | |
1992 | + feature = tdesc_find_feature (tdesc, "org.gnu.gdb.sh.sh2a"); | |
1993 | + if (feature != NULL) | |
1994 | + flavour = sh_sh2a_flavour; | |
1995 | + } | |
2268 | 1996 | |
2269 | - set_gdbarch_register_type (gdbarch, sh_default_register_type); | |
2270 | - set_gdbarch_register_reggroup_p (gdbarch, sh_register_reggroup_p); | |
1997 | + if (feature == NULL) | |
1998 | + { | |
1999 | + feature = tdesc_find_feature (tdesc, "org.gnu.gdb.sh3"); | |
2000 | + if (feature != NULL) | |
2001 | + flavour = sh_sh3_flavour; | |
2002 | + } | |
2271 | 2003 | |
2272 | - set_gdbarch_breakpoint_kind_from_pc (gdbarch, sh_breakpoint_kind_from_pc); | |
2273 | - set_gdbarch_sw_breakpoint_from_kind (gdbarch, sh_sw_breakpoint_from_kind); | |
2004 | + if (feature == NULL) | |
2005 | + return NULL; | |
2274 | 2006 | |
2275 | - set_gdbarch_register_sim_regno (gdbarch, legacy_register_sim_regno); | |
2007 | + tdesc_data = tdesc_data_alloc (); | |
2276 | 2008 | |
2277 | - set_gdbarch_return_value (gdbarch, sh_return_value_nofpu); | |
2009 | + valid_p = 1; | |
2010 | + for (i = 0; i <= SR_REGNUM; i++) | |
2011 | + valid_p &= tdesc_numbered_register (feature, tdesc_data, i, | |
2012 | + sh_register_names[i]); | |
2013 | + if (flavour == sh_sh2a_flavour) | |
2014 | + { | |
2015 | + for (i = 0; i < ARRAY_SIZE(sh2a_register_names); i++) | |
2016 | + valid_p &= tdesc_numbered_register (feature, tdesc_data, | |
2017 | + i + R0_BANK0_REGNUM, | |
2018 | + sh2a_register_names[i]); | |
2019 | + } | |
2020 | + else if (flavour == sh_sh3_flavour) | |
2021 | + { | |
2022 | + for (i = 0; i < ARRAY_SIZE(sh3_register_names); i++) | |
2023 | + valid_p &= tdesc_numbered_register (feature, tdesc_data, | |
2024 | + i + SSR_REGNUM, | |
2025 | + sh3_register_names[i]); | |
2026 | + } | |
2278 | 2027 | |
2279 | - set_gdbarch_skip_prologue (gdbarch, sh_skip_prologue); | |
2280 | - set_gdbarch_inner_than (gdbarch, core_addr_lessthan); | |
2028 | + if (!valid_p) | |
2029 | + { | |
2030 | + tdesc_data_cleanup (tdesc_data); | |
2031 | + return NULL; | |
2032 | + } | |
2281 | 2033 | |
2282 | - set_gdbarch_push_dummy_call (gdbarch, sh_push_dummy_call_nofpu); | |
2283 | - set_gdbarch_return_in_first_hidden_param_p (gdbarch, | |
2284 | - sh_return_in_first_hidden_param_p); | |
2034 | + feature = tdesc_find_feature (tdesc, "org.gnu.gdb.sh.fpu"); | |
2035 | + if (feature != NULL) | |
2036 | + { | |
2037 | + valid_p = 1; | |
2038 | + for (i = 0; i < ARRAY_SIZE(sh_fpregister_names); i++) | |
2039 | + valid_p &= tdesc_numbered_register (feature, tdesc_data, | |
2040 | + i + FPUL_REGNUM, | |
2041 | + sh_fpregister_names[i]); | |
2042 | + if (!valid_p) | |
2043 | + { | |
2044 | + tdesc_data_cleanup (tdesc_data); | |
2045 | + return NULL; | |
2046 | + } | |
2047 | + has_fp = 1; | |
2048 | + } | |
2285 | 2049 | |
2286 | - set_gdbarch_believe_pcc_promotion (gdbarch, 1); | |
2050 | + feature = tdesc_find_feature (tdesc, "org.gnu.gdb.sh.dsp"); | |
2051 | + if (feature != NULL) | |
2052 | + { | |
2053 | + for (i = 0; i < ARRAY_SIZE(sh_dspregister_names); i++) | |
2054 | + valid_p &= tdesc_numbered_register (feature, tdesc_data, | |
2055 | + i + A0G_REGNUM, | |
2056 | + sh_dspregister_names[i]); | |
2057 | + if (!valid_p) | |
2058 | + { | |
2059 | + tdesc_data_cleanup (tdesc_data); | |
2060 | + return NULL; | |
2061 | + } | |
2062 | + has_dsp = 1; | |
2063 | + } | |
2287 | 2064 | |
2288 | - set_gdbarch_frame_align (gdbarch, sh_frame_align); | |
2289 | - frame_base_set_default (gdbarch, &sh_frame_base); | |
2065 | + feature = tdesc_find_feature (tdesc, "org.gnu.gdb.sh.dfp"); | |
2066 | + if (feature != NULL) | |
2067 | + { | |
2068 | + valid_p = 1; | |
2290 | 2069 | |
2291 | - set_gdbarch_stack_frame_destroyed_p (gdbarch, sh_stack_frame_destroyed_p); | |
2070 | + for (i = 0; i < ARRAY_SIZE(sh_drregister_names); i++) | |
2071 | + valid_p &= tdesc_numbered_register (feature, tdesc_data, | |
2072 | + i + DR0_REGNUM, | |
2073 | + sh_drregister_names[i]); | |
2074 | + if (!valid_p) | |
2075 | + { | |
2076 | + tdesc_data_cleanup (tdesc_data); | |
2077 | + return NULL; | |
2078 | + } | |
2079 | + has_dfp_pseudos = 1; | |
2080 | + } | |
2292 | 2081 | |
2293 | - dwarf2_frame_set_init_reg (gdbarch, sh_dwarf2_frame_init_reg); | |
2082 | + feature = tdesc_find_feature (tdesc, "org.gnu.gdb.sh.vfp"); | |
2083 | + if (feature != NULL) | |
2084 | + { | |
2085 | + valid_p = 1; | |
2294 | 2086 | |
2295 | - set_gdbarch_iterate_over_regset_sections | |
2296 | - (gdbarch, sh_iterate_over_regset_sections); | |
2087 | + for (i = 0; i < ARRAY_SIZE(sh_vfregister_names); i++) | |
2088 | + valid_p &= tdesc_numbered_register (feature, tdesc_data, | |
2089 | + i + FV0_REGNUM, | |
2090 | + sh_vfregister_names[i]); | |
2091 | + if (!valid_p) | |
2092 | + { | |
2093 | + tdesc_data_cleanup (tdesc_data); | |
2094 | + return NULL; | |
2095 | + } | |
2096 | + has_vfp_pseudos = 1; | |
2097 | + } | |
2098 | + } | |
2297 | 2099 | |
2298 | - switch (info.bfd_arch_info->mach) | |
2100 | + /* If there is already a candidate, use it. */ | |
2101 | + for (best_arch = gdbarch_list_lookup_by_info (arches, &info); | |
2102 | + best_arch != NULL; | |
2103 | + best_arch = gdbarch_list_lookup_by_info (best_arch->next, &info)) | |
2299 | 2104 | { |
2300 | - case bfd_mach_sh: | |
2301 | - set_gdbarch_register_name (gdbarch, sh_sh_register_name); | |
2302 | - break; | |
2105 | + if (flavour != gdbarch_tdep (best_arch->gdbarch)->flavour) | |
2106 | + continue; | |
2303 | 2107 | |
2304 | - case bfd_mach_sh2: | |
2305 | - set_gdbarch_register_name (gdbarch, sh_sh_register_name); | |
2306 | - break; | |
2108 | + if (has_fp != gdbarch_tdep (best_arch->gdbarch)->have_fpu) | |
2109 | + continue; | |
2307 | 2110 | |
2308 | - case bfd_mach_sh2e: | |
2309 | - /* doubles on sh2e and sh3e are actually 4 byte. */ | |
2310 | - set_gdbarch_double_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
2311 | - set_gdbarch_double_format (gdbarch, floatformats_ieee_single); | |
2111 | + if (has_dsp != gdbarch_tdep (best_arch->gdbarch)->have_dsp) | |
2112 | + continue; | |
2312 | 2113 | |
2313 | - set_gdbarch_register_name (gdbarch, sh_sh2e_register_name); | |
2314 | - set_gdbarch_register_type (gdbarch, sh_sh3e_register_type); | |
2315 | - set_gdbarch_fp0_regnum (gdbarch, 25); | |
2316 | - set_gdbarch_return_value (gdbarch, sh_return_value_fpu); | |
2317 | - set_gdbarch_push_dummy_call (gdbarch, sh_push_dummy_call_fpu); | |
2318 | 2114 | break; |
2115 | + } | |
2319 | 2116 | |
2320 | - case bfd_mach_sh2a: | |
2321 | - set_gdbarch_register_name (gdbarch, sh_sh2a_register_name); | |
2322 | - set_gdbarch_register_type (gdbarch, sh_sh2a_register_type); | |
2323 | - set_gdbarch_register_sim_regno (gdbarch, sh_sh2a_register_sim_regno); | |
2324 | - | |
2325 | - set_gdbarch_fp0_regnum (gdbarch, 25); | |
2326 | - set_gdbarch_num_pseudo_regs (gdbarch, 9); | |
2327 | - set_gdbarch_pseudo_register_read (gdbarch, sh_pseudo_register_read); | |
2328 | - set_gdbarch_pseudo_register_write (gdbarch, sh_pseudo_register_write); | |
2329 | - set_gdbarch_return_value (gdbarch, sh_return_value_fpu); | |
2330 | - set_gdbarch_push_dummy_call (gdbarch, sh_push_dummy_call_fpu); | |
2331 | - break; | |
2117 | + if (best_arch != NULL) | |
2118 | + { | |
2119 | + if (tdesc_data != NULL) | |
2120 | + tdesc_data_cleanup (tdesc_data); | |
2121 | + return best_arch->gdbarch; | |
2122 | + } | |
2332 | 2123 | |
2333 | - case bfd_mach_sh2a_nofpu: | |
2334 | - set_gdbarch_register_name (gdbarch, sh_sh2a_nofpu_register_name); | |
2335 | - set_gdbarch_register_sim_regno (gdbarch, sh_sh2a_register_sim_regno); | |
2124 | + /* None found, create a new architecture from the information | |
2125 | + provided. */ | |
2126 | + tdep = XCNEW (struct gdbarch_tdep); | |
2127 | + gdbarch = gdbarch_alloc (&info, tdep); | |
2336 | 2128 | |
2337 | - set_gdbarch_num_pseudo_regs (gdbarch, 1); | |
2338 | - set_gdbarch_pseudo_register_read (gdbarch, sh_pseudo_register_read); | |
2339 | - set_gdbarch_pseudo_register_write (gdbarch, sh_pseudo_register_write); | |
2340 | - break; | |
2129 | + set_gdbarch_num_regs (gdbarch, SH_NUM_REGS); | |
2130 | + set_gdbarch_sp_regnum (gdbarch, SP_REGNUM); | |
2131 | + set_gdbarch_pc_regnum (gdbarch, PC_REGNUM); | |
2132 | + set_gdbarch_num_pseudo_regs (gdbarch, 0); | |
2341 | 2133 | |
2342 | - case bfd_mach_sh_dsp: | |
2343 | - set_gdbarch_register_name (gdbarch, sh_sh_dsp_register_name); | |
2344 | - set_gdbarch_register_sim_regno (gdbarch, sh_dsp_register_sim_regno); | |
2345 | - break; | |
2134 | + set_gdbarch_register_type (gdbarch, sh_register_type); | |
2135 | + set_gdbarch_register_reggroup_p (gdbarch, sh_register_reggroup_p); | |
2346 | 2136 | |
2347 | - case bfd_mach_sh3: | |
2348 | - case bfd_mach_sh3_nommu: | |
2349 | - case bfd_mach_sh2a_nofpu_or_sh3_nommu: | |
2350 | - set_gdbarch_register_name (gdbarch, sh_sh3_register_name); | |
2351 | - break; | |
2137 | + set_gdbarch_breakpoint_kind_from_pc (gdbarch, sh_breakpoint_kind_from_pc); | |
2138 | + set_gdbarch_sw_breakpoint_from_kind (gdbarch, sh_sw_breakpoint_from_kind); | |
2352 | 2139 | |
2353 | - case bfd_mach_sh3e: | |
2354 | - case bfd_mach_sh2a_or_sh3e: | |
2355 | - /* doubles on sh2e and sh3e are actually 4 byte. */ | |
2356 | - set_gdbarch_double_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
2357 | - set_gdbarch_double_format (gdbarch, floatformats_ieee_single); | |
2140 | + set_gdbarch_skip_prologue (gdbarch, sh_skip_prologue); | |
2141 | + set_gdbarch_inner_than (gdbarch, core_addr_lessthan); | |
2358 | 2142 | |
2359 | - set_gdbarch_register_name (gdbarch, sh_sh3e_register_name); | |
2360 | - set_gdbarch_register_type (gdbarch, sh_sh3e_register_type); | |
2361 | - set_gdbarch_fp0_regnum (gdbarch, 25); | |
2143 | + set_gdbarch_return_in_first_hidden_param_p (gdbarch, | |
2144 | + sh_return_in_first_hidden_param_p); | |
2145 | + if (has_fp) | |
2146 | + { | |
2147 | + set_gdbarch_fp0_regnum (gdbarch, FR0_REGNUM); | |
2362 | 2148 | set_gdbarch_return_value (gdbarch, sh_return_value_fpu); |
2363 | 2149 | set_gdbarch_push_dummy_call (gdbarch, sh_push_dummy_call_fpu); |
2364 | - break; | |
2150 | + } | |
2151 | + else | |
2152 | + { | |
2153 | + set_gdbarch_fp0_regnum (gdbarch, -1); | |
2154 | + set_gdbarch_push_dummy_call (gdbarch, sh_push_dummy_call_nofpu); | |
2155 | + set_gdbarch_return_value (gdbarch, sh_return_value_nofpu); | |
2156 | + } | |
2365 | 2157 | |
2366 | - case bfd_mach_sh3_dsp: | |
2367 | - set_gdbarch_register_name (gdbarch, sh_sh3_dsp_register_name); | |
2158 | + if (has_dsp) | |
2159 | + { | |
2368 | 2160 | set_gdbarch_register_sim_regno (gdbarch, sh_dsp_register_sim_regno); |
2369 | - break; | |
2161 | + } | |
2162 | + else | |
2163 | + { | |
2164 | + set_gdbarch_register_sim_regno (gdbarch, legacy_register_sim_regno); | |
2165 | + } | |
2370 | 2166 | |
2371 | - case bfd_mach_sh4: | |
2372 | - case bfd_mach_sh4a: | |
2373 | - case bfd_mach_sh2a_or_sh4: | |
2374 | - set_gdbarch_register_name (gdbarch, sh_sh4_register_name); | |
2375 | - set_gdbarch_register_type (gdbarch, sh_sh4_register_type); | |
2376 | - set_gdbarch_fp0_regnum (gdbarch, 25); | |
2377 | - set_gdbarch_num_pseudo_regs (gdbarch, 13); | |
2167 | + if (flavour == sh_sh2a_flavour) | |
2168 | + { | |
2169 | + num_pseudos = 1; | |
2170 | + set_gdbarch_register_sim_regno (gdbarch, sh_sh2a_register_sim_regno); | |
2171 | + } | |
2172 | + if (has_dfp_pseudos) | |
2173 | + { | |
2174 | + num_pseudos += 8; | |
2175 | + } | |
2176 | + if (has_vfp_pseudos) | |
2177 | + { | |
2178 | + num_pseudos += 4; | |
2179 | + } | |
2180 | + if (num_pseudos > 0) | |
2181 | + { | |
2182 | + set_gdbarch_num_pseudo_regs (gdbarch, num_pseudos); | |
2378 | 2183 | set_gdbarch_pseudo_register_read (gdbarch, sh_pseudo_register_read); |
2379 | 2184 | set_gdbarch_pseudo_register_write (gdbarch, sh_pseudo_register_write); |
2380 | - set_gdbarch_return_value (gdbarch, sh_return_value_fpu); | |
2381 | - set_gdbarch_push_dummy_call (gdbarch, sh_push_dummy_call_fpu); | |
2382 | - break; | |
2185 | + } | |
2383 | 2186 | |
2384 | - case bfd_mach_sh4_nofpu: | |
2385 | - case bfd_mach_sh4a_nofpu: | |
2386 | - case bfd_mach_sh4_nommu_nofpu: | |
2387 | - case bfd_mach_sh2a_nofpu_or_sh4_nommu_nofpu: | |
2388 | - set_gdbarch_register_name (gdbarch, sh_sh4_nofpu_register_name); | |
2389 | - break; | |
2187 | + set_gdbarch_believe_pcc_promotion (gdbarch, 1); | |
2390 | 2188 | |
2391 | - case bfd_mach_sh4al_dsp: | |
2392 | - set_gdbarch_register_name (gdbarch, sh_sh4al_dsp_register_name); | |
2393 | - set_gdbarch_register_sim_regno (gdbarch, sh_dsp_register_sim_regno); | |
2394 | - break; | |
2189 | + set_gdbarch_frame_align (gdbarch, sh_frame_align); | |
2190 | + frame_base_set_default (gdbarch, &sh_frame_base); | |
2395 | 2191 | |
2396 | - default: | |
2397 | - set_gdbarch_register_name (gdbarch, sh_sh_register_name); | |
2398 | - break; | |
2399 | - } | |
2192 | + set_gdbarch_stack_frame_destroyed_p (gdbarch, sh_stack_frame_destroyed_p); | |
2193 | + | |
2194 | + dwarf2_frame_set_init_reg (gdbarch, sh_dwarf2_frame_init_reg); | |
2195 | + | |
2196 | + set_gdbarch_iterate_over_regset_sections | |
2197 | + (gdbarch, sh_iterate_over_regset_sections); | |
2400 | 2198 | |
2401 | 2199 | /* Hook in ABI-specific overrides, if they have been registered. */ |
2402 | 2200 | gdbarch_init_osabi (info, gdbarch); |
@@ -2405,6 +2203,12 @@ sh_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) | ||
2405 | 2203 | frame_unwind_append_unwinder (gdbarch, &sh_stub_unwind); |
2406 | 2204 | frame_unwind_append_unwinder (gdbarch, &sh_frame_unwind); |
2407 | 2205 | |
2206 | + if (tdesc_data) | |
2207 | + tdesc_use_registers (gdbarch, tdesc, tdesc_data); | |
2208 | + | |
2209 | + gdbarch_tdep (gdbarch)->flavour = flavour; | |
2210 | + gdbarch_tdep (gdbarch)->have_fpu = has_fp; | |
2211 | + gdbarch_tdep (gdbarch)->have_dsp = has_dsp; | |
2408 | 2212 | return gdbarch; |
2409 | 2213 | } |
2410 | 2214 |
@@ -2425,8 +2229,15 @@ set_sh_command (const char *args, int from_tty) | ||
2425 | 2229 | void |
2426 | 2230 | _initialize_sh_tdep (void) |
2427 | 2231 | { |
2428 | - gdbarch_register (bfd_arch_sh, sh_gdbarch_init, NULL); | |
2429 | - | |
2232 | + register_gdbarch_init (bfd_arch_sh, sh_gdbarch_init); | |
2233 | + initialize_tdesc_sh (); | |
2234 | + initialize_tdesc_sh_fpu (); | |
2235 | + initialize_tdesc_sh_dsp (); | |
2236 | + initialize_tdesc_sh2a_fpu (); | |
2237 | + initialize_tdesc_sh2a_nofpu (); | |
2238 | + initialize_tdesc_sh3 (); | |
2239 | + initialize_tdesc_sh4_dfp (); | |
2240 | + initialize_tdesc_sh4_vfp (); | |
2430 | 2241 | add_prefix_cmd ("sh", no_class, set_sh_command, "SH specific commands.", |
2431 | 2242 | &setshcmdlist, "set sh ", 0, &setlist); |
2432 | 2243 | add_prefix_cmd ("sh", no_class, show_sh_command, "SH specific commands.", |
@@ -29,6 +29,7 @@ enum | ||
29 | 29 | ARG0_REGNUM = 4, |
30 | 30 | ARGLAST_REGNUM = 7, |
31 | 31 | FP_REGNUM = 14, |
32 | + SP_REGNUM = 15, | |
32 | 33 | PC_REGNUM = 16, |
33 | 34 | PR_REGNUM = 17, |
34 | 35 | GBR_REGNUM = 18, |
@@ -82,6 +83,13 @@ enum | ||
82 | 83 | FV_LAST_REGNUM = 79 |
83 | 84 | }; |
84 | 85 | |
86 | +enum sh_flavour | |
87 | + { | |
88 | + sh_no_flavour, | |
89 | + sh_sh2a_flavour, | |
90 | + sh_sh3_flavour, | |
91 | + }; | |
92 | + | |
85 | 93 | /* This structure describes a register in a core-file. */ |
86 | 94 | struct sh_corefile_regmap |
87 | 95 | { |
@@ -103,6 +111,9 @@ struct gdbarch_tdep | ||
103 | 111 | int sizeof_fpregset; |
104 | 112 | /* ISA-specific data types. */ |
105 | 113 | struct type *sh_littlebyte_bigword_type; |
114 | + int have_fpu; | |
115 | + int have_dsp; | |
116 | + enum sh_flavour flavour; | |
106 | 117 | }; |
107 | 118 | |
108 | 119 | extern const struct regset sh_corefile_gregset; |