Revisión | 46c7e9ed03dfeb2ac6a05ccd05d1a884573bb452 (tree) |
---|---|
Tiempo | 2022-07-14 06:03:37 |
Autor | Weijie Gao <weijie.gao@medi...> |
Commiter | Daniel Schwierzeck |
doc: mediatek: add documentation for mt7621 reference boards
The MT7621 requires external binary blob being executed during u-boot's
boot-up flow. It's necessary to provide a guide here for users to correctly
build the u-boot.
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
@@ -23,6 +23,7 @@ Board-specific doc | ||
23 | 23 | highbank/index |
24 | 24 | intel/index |
25 | 25 | kontron/index |
26 | + mediatek/index | |
26 | 27 | microchip/index |
27 | 28 | nokia/index |
28 | 29 | nxp/index |
@@ -0,0 +1,9 @@ | ||
1 | +.. SPDX-License-Identifier: GPL-2.0+ | |
2 | + | |
3 | +Mediatek | |
4 | +========= | |
5 | + | |
6 | +.. toctree:: | |
7 | + :maxdepth: 2 | |
8 | + | |
9 | + mt7621 |
@@ -0,0 +1,48 @@ | ||
1 | +.. SPDX-License-Identifier: GPL-2.0 | |
2 | + | |
3 | +mt7621_rfb/mt7621_nand_rfb | |
4 | +========================== | |
5 | + | |
6 | +U-Boot for the MediaTek MT7621 boards | |
7 | + | |
8 | +Quick Start | |
9 | +----------- | |
10 | + | |
11 | +- Get the DDR initialization binary blob | |
12 | +- Configure CPU and DDR parameters | |
13 | +- Build U-Boot | |
14 | + | |
15 | +Get the DDR initialization binary blob | |
16 | +-------------------------------------- | |
17 | + | |
18 | +Download one from: | |
19 | + - https://raw.githubusercontent.com/mtk-openwrt/mt7621-lowlevel-preloader/master/mt7621_stage_sram.bin | |
20 | + - https://raw.githubusercontent.com/mtk-openwrt/mt7621-lowlevel-preloader/master/mt7621_stage_sram_noprint.bin | |
21 | + | |
22 | +mt7621_stage_sram_noprint.bin has removed all output logs. To use this one, | |
23 | +download and rename it to mt7621_stage_sram.bin | |
24 | + | |
25 | +Put the binary blob to the u-boot build directory. | |
26 | + | |
27 | +Configure CPU and DDR parameters | |
28 | +-------------------------------- | |
29 | + | |
30 | +menuconfig > MIPS architecture > MediaTek MIPS platforms > CPU & DDR configuration | |
31 | + | |
32 | +Select the correct DDR timing parameters for your board. The size shown here | |
33 | +must match the DDR size of you board. | |
34 | + | |
35 | +The frequency of CPU and DDR can also be adjusted. | |
36 | + | |
37 | +Build U-Boot | |
38 | +------------ | |
39 | + | |
40 | +.. code-block:: bash | |
41 | + | |
42 | + $ export CROSS_COMPILE=mipsel-linux- | |
43 | + $ make O=build mt7621_rfb_defconfig # or mt7621_nand_rfb_defconfig | |
44 | + $ cp mt7621_stage_sram.bin ./build/mt7621_stage_sram.bin | |
45 | + $ # or cp mt7621_stage_sram_noprint.bin ./build/mt7621_stage_sram.bin | |
46 | + $ make O=build | |
47 | + | |
48 | +Burn the u-boot-mt7621.bin to the SPI-NOR or NAND flash. |