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Revisión8c2fe29035f078836c51aa99106a0ec82190feb2 (tree)
Tiempo2019-06-13 12:26:16
AutorYoshinori Sato <ysato@user...>
CommiterYoshinori Sato

Log Message

h8300 update

Cambiar Resumen

Diferencia incremental

--- a/Kconfig
+++ b/Kconfig
@@ -107,6 +107,7 @@ config ENV_VARS_UBOOT_CONFIG
107107
108108 config NR_DRAM_BANKS
109109 int "Number of DRAM banks"
110+ depends on !H8300
110111 default 4
111112 help
112113 This defines the number of DRAM banks.
@@ -500,7 +501,7 @@ config SYS_EXTRA_OPTIONS
500501 new boards should not use this option.
501502
502503 config SYS_TEXT_BASE
503- depends on !NIOS2 && !XTENSA
504+ depends on !NIOS2 && !XTENSA && !H8300
504505 depends on !EFI_APP
505506 default 0x80800000 if ARCH_OMAP2PLUS || ARCH_K3
506507 default 0x4a000000 if ARCH_SUNXI && !MACH_SUN9I && !MACH_SUN8I_V3S
--- a/Makefile
+++ b/Makefile
@@ -887,7 +887,7 @@ LDFLAGS_u-boot += $(LDFLAGS_FINAL)
887887 # Avoid 'Not enough room for program headers' error on binutils 2.28 onwards.
888888 LDFLAGS_u-boot += $(call ld-option, --no-dynamic-linker)
889889
890-ifeq ($(CONFIG_ARC)$(CONFIG_NIOS2)$(CONFIG_X86)$(CONFIG_XTENSA),)
890+ifeq ($(CONFIG_ARC)$(CONFIG_NIOS2)$(CONFIG_X86)$(CONFIG_XTENSA)$(CONFIG_H8300),)
891891 LDFLAGS_u-boot += -Ttext $(CONFIG_SYS_TEXT_BASE)
892892 endif
893893
--- a/arch/Kconfig
+++ b/arch/Kconfig
@@ -3,7 +3,6 @@ config CREATE_ARCH_SYMLINK
33
44 config HAVE_ARCH_IOREMAP
55 bool
6- depends on HAVE_GENERIC_BOARD
76
87 choice
98 prompt "Architecture select"
@@ -15,8 +14,6 @@ config ARC
1514 select ARC_TIMER
1615 select CLK
1716 select HAVE_PRIVATE_LIBGCC
18- select HAVE_GENERIC_BOARD
19- select SYS_GENERIC_BOARD
2017 select SUPPORT_OF_CONTROL
2118 select TIMER
2219
@@ -26,14 +23,9 @@ config ARM
2623 select HAVE_PRIVATE_LIBGCC if !ARM64
2724 select SUPPORT_OF_CONTROL
2825
29-config AVR32
30- bool "AVR32 architecture"
31- select HAVE_GENERIC_BOARD
32-
33-config BLACKFIN
34- bool "Blackfin architecture"
35- select HAVE_GENERIC_BOARD
36- select SYS_GENERIC_BOARD
26+config H8300
27+ bool "H8/300 architecture"
28+ select SUPPORT_OF_CONTROL
3729
3830 config M68K
3931 bool "M68000 architecture"
@@ -44,8 +36,6 @@ config M68K
4436
4537 config MICROBLAZE
4638 bool "MicroBlaze architecture"
47- select HAVE_GENERIC_BOARD
48- select SYS_GENERIC_BOARD
4939 select SUPPORT_OF_CONTROL
5040 imply CMD_IRQ
5141
@@ -70,7 +60,6 @@ config NIOS2
7060 config PPC
7161 bool "PowerPC architecture"
7262 select HAVE_PRIVATE_LIBGCC
73- select HAVE_GENERIC_BOARD
7463 select SUPPORT_OF_CONTROL
7564 select SYS_BOOT_GET_CMDLINE
7665 select SYS_BOOT_GET_KBD
@@ -101,7 +90,6 @@ config SANDBOX
10190 select DM_KEYBOARD
10291 select DM_MMC
10392 select DM_SERIAL
104- select DM_I2C
10593 select DM_SPI
10694 select DM_SPI_FLASH
10795 select HAVE_BLOCK_DEVICE
@@ -141,9 +129,6 @@ config SH
141129 bool "SuperH architecture"
142130 select HAVE_PRIVATE_LIBGCC
143131
144-config SPARC
145- bool "SPARC architecture"
146-
147132 config X86
148133 bool "x86 architecture"
149134 select SUPPORT_SPL
@@ -291,19 +276,15 @@ config SYS_DISABLE_DCACHE_OPS
291276
292277 source "arch/arc/Kconfig"
293278 source "arch/arm/Kconfig"
294-source "arch/avr32/Kconfig"
295-source "arch/blackfin/Kconfig"
296279 source "arch/h8300/Kconfig"
297280 source "arch/m68k/Kconfig"
298281 source "arch/microblaze/Kconfig"
299282 source "arch/mips/Kconfig"
300283 source "arch/nds32/Kconfig"
301284 source "arch/nios2/Kconfig"
302-source "arch/openrisc/Kconfig"
303285 source "arch/powerpc/Kconfig"
304286 source "arch/sandbox/Kconfig"
305287 source "arch/sh/Kconfig"
306-source "arch/sparc/Kconfig"
307288 source "arch/x86/Kconfig"
308289 source "arch/xtensa/Kconfig"
309290 source "arch/riscv/Kconfig"
--- a/arch/h8300/Kconfig
+++ b/arch/h8300/Kconfig
@@ -41,6 +41,13 @@ config SYS_CPU
4141 default "h8300h" if CPU_H8300H
4242 default "h8300s" if CPU_H8S
4343
44+config CPU_H83069
45+ bool
46+
47+config TIMER_BASE
48+ hex
49+ default 0xffff80
50+
4451 source "board/h8300h_sim/Kconfig"
4552 source "board/h8300s_sim/Kconfig"
4653 source "board/ae3069/Kconfig"
--- a/arch/h8300/cpu/h8300h/start.S
+++ b/arch/h8300/cpu/h8300h/start.S
@@ -50,8 +50,9 @@ _start:
5050 bne 1b
5151 mov.l #_run_stack,sp
5252 mov.l sp,er0
53- jsr @board_init_f_mem
53+ jsr @board_init_f_alloc_reserve
5454 mov.l er0,sp
55+ jsr @board_init_f_init_reserve
5556 sub.l er0,er0 /* boot flags */
5657 jsr @board_init_f
5758 bra .
--- a/arch/h8300/dts/kanebebe.dts
+++ b/arch/h8300/dts/kanebebe.dts
@@ -7,7 +7,7 @@
77 interrupt-parent = <&h8intc>;
88
99 chosen {
10- stdout-path = &sci1;
10+ stdout-path = &sci0;
1111 };
1212 aliases {
1313 serial0 = &sci0;
@@ -36,8 +36,7 @@
3636 clock-mult = <1>;
3737 };
3838
39- memory@400000 {
40- device_type = "memory";
39+ memory {
4140 reg = <0x400000 0x400000>;
4241 };
4342
--- a/arch/h8300/include/asm/bitops.h
+++ b/arch/h8300/include/asm/bitops.h
@@ -182,5 +182,7 @@ static __inline__ unsigned long __ffs(unsigned long word)
182182 return result;
183183 }
184184
185+#include <asm-generic/bitops/fls.h>
186+#include <asm-generic/bitops/fls64.h>
185187
186188 #endif /* _H8300_BITOPS_H */
--- a/arch/h8300/include/asm/config.h
+++ b/arch/h8300/include/asm/config.h
@@ -21,6 +21,4 @@
2121 #ifndef _ASM_CONFIG_H_
2222 #define _ASM_CONFIG_H_
2323
24-#define CONFIG_RELOC_FIXUP_WORKS
25-
2624 #endif
--- /dev/null
+++ b/arch/h8300/include/asm/linkage.h
@@ -0,0 +1,11 @@
1+/* SPDX-License-Identifier: GPL-2.0+ */
2+/*
3+ * U-Boot - linkage.h
4+ *
5+ * Copyright (c) 2005-2007 Analog Devices Inc.
6+ */
7+
8+#ifndef __ASM_LINKAGE_H
9+#define __ASM_LINKAGE_H
10+
11+#endif
--- a/arch/h8300/lib/Makefile
+++ b/arch/h8300/lib/Makefile
@@ -7,4 +7,4 @@
77 # SPDX-License-Identifier: GPL-2.0+
88 #
99
10-obj-y = bootm.o time.o gpio.o gd.o
10+obj-y = bootm.o gd.o time.o #gpio.o
--- a/board/nisshin-tech/kanebebe/kanebebe.c
+++ b/board/nisshin-tech/kanebebe/kanebebe.c
@@ -34,22 +34,15 @@ void n9604_udc_probe(void);
3434
3535 int board_early_init_f(void)
3636 {
37+#if 0
3738 h8300_gpio_init();
39+#endif
3840 #ifdef CONFIG_USB_GADGET_N9604
3941 n9604_udc_probe();
4042 #endif
4143 return 0;
4244 }
4345
44-void dram_init_banksize(void)
45-{
46- DECLARE_GLOBAL_DATA_PTR;
47-
48- gd->bd->bi_memstart = CONFIG_SYS_DRAM_BASE;
49- gd->bd->bi_memsize = CONFIG_SYS_DRAM_SIZE;
50- gd->ram_size = CONFIG_SYS_DRAM_SIZE;
51-}
52-
5346 #if defined(CONFIG_CMD_NET) && !defined(CONFIG_DM_ETH)
5447 int board_eth_init(bd_t *bis)
5548 {
@@ -66,9 +59,9 @@ int board_eth_init(bd_t *bis)
6659
6760 int board_late_init(void)
6861 {
62+#ifdef CONFIG_CMD_MMC
6963 DECLARE_GLOBAL_DATA_PTR;
7064
71-#ifdef CONFIG_CMD_MMC
7265 mmc_initialize(gd->bd);
7366 #endif
7467 #ifdef CONFIG_CMD_LED
@@ -78,3 +71,16 @@ int board_late_init(void)
7871
7972 return 0;
8073 }
74+
75+int dram_init(void)
76+{
77+ if (fdtdec_setup_mem_size_base() != 0)
78+ return -EINVAL;
79+
80+ return 0;
81+}
82+
83+int dram_init_banksize(void)
84+{
85+ return 0;
86+}
--- a/cmd/bdinfo.c
+++ b/cmd/bdinfo.c
@@ -455,6 +455,18 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
455455 return 0;
456456 }
457457
458+#elif defined(CONFIG_H8300)
459+
460+int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
461+{
462+ bd_t *bd = gd->bd;
463+
464+ print_bi_mem(bd);
465+ print_eth_ip_addr();
466+ print_baudrate();
467+ return 0;
468+}
469+
458470 #else
459471 #error "a case for this architecture does not exist!"
460472 #endif
--- a/cpu/h8300h/Makefile
+++ /dev/null
@@ -1,12 +0,0 @@
1-#
2-# (C) Copyright 2000-2006
3-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4-#
5-# Copyright (C) 2014 Yoshinori Sato <ysato@users.sourceforge.jp>
6-# Copyright (C) 2008 Renesas Solutions Corp.
7-#
8-# SPDX-License-Identifier: GPL-2.0+
9-#
10-
11-extra-y = start.o
12-obj-y = cpu.o interrupts.o watchdog.o
--- a/cpu/h8300h/config.mk
+++ /dev/null
@@ -1,27 +0,0 @@
1-#
2-# Copyright (C) 2010 Yoshinori Sato <ysato@users.sourceforge.jp>
3-#
4-# See file CREDITS for list of people who contributed to this
5-# project.
6-#
7-# This program is free software; you can redistribute it and/or
8-# modify it under the terms of the GNU General Public License as
9-# published by the Free Software Foundation; either version 2 of
10-# the License, or (at your option) any later version.
11-#
12-# This program is distributed in the hope that it will be useful,
13-# but WITHOUT ANY WARRANTY; without even the implied warranty of
14-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15-# GNU General Public License for more details.
16-#
17-# You should have received a copy of the GNU General Public License
18-# along with this program; if not, write to the Free Software
19-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
20-# MA 02111-1307 USA
21-#
22-#
23-PLATFORM_CPPFLAGS += -mh -Wa,--mach=h8300h
24-CFLAGS += -mh
25-USE_PRIVATE_LIBGCC = $(shell dirname `$(CC) $(CFLAGS) -mh -print-libgcc-file-name`)
26-LDEMUL = -mh8300helf_linux
27-LDFLAGS += $(LDEMUL)
--- a/cpu/h8300h/cpu.c
+++ /dev/null
@@ -1,84 +0,0 @@
1-/*
2- * Copyright (C) 2010 Yoshinori Sato <ysato@users.sourceforge.jp>
3- *
4- * See file CREDITS for list of people who contributed to this
5- * project.
6- *
7- * This program is free software; you can redistribute it and/or
8- * modify it under the terms of the GNU General Public License as
9- * published by the Free Software Foundation; either version 2 of
10- * the License, or (at your option) any later version.
11- *
12- * This program is distributed in the hope that it will be useful,
13- * but WITHOUT ANY WARRANTY; without even the implied warranty of
14- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15- * GNU General Public License for more details.
16- *
17- * You should have received a copy of the GNU General Public License
18- * along with this program; if not, write to the Free Software
19- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
20- * MA 02111-1307 USA
21- */
22-
23-#include <common.h>
24-#include <command.h>
25-#include <asm/processor.h>
26-#include <asm/io.h>
27-
28-int checkcpu(void)
29-{
30- puts("CPU: H8/300H\n");
31- return 0;
32-}
33-
34-int arch_cpu_init(void)
35-{
36- DECLARE_GLOBAL_DATA_PTR;
37- gd->ram_size = CONFIG_SYS_DRAM_SIZE;
38- gd->cpu_clk = CONFIG_SYS_CLK_FREQ;
39- return 0;
40-}
41-
42-int cleanup_before_linux(void)
43-{
44- disable_interrupts();
45- return 0;
46-}
47-
48-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
49-{
50- disable_interrupts();
51- reset_cpu(0);
52- return 0;
53-}
54-
55-void flush_cache(unsigned long addr, unsigned long size)
56-{
57-
58-}
59-
60-void icache_enable(void)
61-{
62-}
63-
64-void icache_disable(void)
65-{
66-}
67-
68-int icache_status(void)
69-{
70- return 0;
71-}
72-
73-void dcache_enable(void)
74-{
75-}
76-
77-void dcache_disable(void)
78-{
79-}
80-
81-int dcache_status(void)
82-{
83- return 0;
84-}
--- a/cpu/h8300h/interrupts.c
+++ /dev/null
@@ -1,38 +0,0 @@
1-/*
2- * Copyright 2010 Yoshinori Sato <ysato@users.sourceforge.jp>
3- *
4- * See file CREDITS for list of people who contributed to this
5- * project.
6- *
7- * This program is free software; you can redistribute it and/or
8- * modify it under the terms of the GNU General Public License as
9- * published by the Free Software Foundation; either version 2 of
10- * the License, or (at your option) any later version.
11- *
12- * This program is distributed in the hope that it will be useful,
13- * but WITHOUT ANY WARRANTY; without even the implied warranty of
14- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15- * GNU General Public License for more details.
16- *
17- * You should have received a copy of the GNU General Public License
18- * along with this program; if not, write to the Free Software
19- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
20- * MA 02111-1307 USA
21- */
22-
23-#include <common.h>
24-
25-int interrupt_init(void)
26-{
27- return 0;
28-}
29-
30-void enable_interrupts(void)
31-{
32-
33-}
34-
35-int disable_interrupts(void)
36-{
37- return 0;
38-}
--- a/cpu/h8300h/start.S
+++ /dev/null
@@ -1,65 +0,0 @@
1-/*
2- * Copyright (C) 2010 Yoshinori Sato <ysato@users.sourceforge.jp>
3-
4- * This program is free software; you can redistribute it and/or
5- * modify it under the terms of the GNU General Public License as
6- * published by the Free Software Foundation; either version 2 of
7- * the License, or (at your option) any later version.
8- *
9- * This program is distributed in the hope that it will be useful,
10- * but WITHOUT ANY WARRANTY; without even the implied warranty of
11- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12- * GNU General Public License for more details.
13- *
14- * You should have received a copy of the GNU General Public License
15- * along with this program; if not, write to the Free Software
16- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
17- * MA 02111-1307 USA
18- */
19-
20-#include <config.h>
21-#include <version.h>
22-
23- .h8300h
24-
25- .section ".vector","ax"
26- .global _start
27- .global relocate_code
28- .long _start
29-vector = 1
30- .rept 63
31- .long __ram_vec + (vector * 4)
32-vector = vector + 1
33- .endr
34-
35- .text
36- .align 2
37-_start:
38- mov.l #__init_stack,sp
39- jsr @_lowlevel_init
40-
41- mov.l #__bss_start,er4
42- mov.l #__bss_end,er5
43- sub er4,er5
44- shlr.l er5
45- shlr.l er5
46- sub.l er0,er0
47-1: mov.l er0,@er4 /* bss clear */
48- adds #4,er4
49- dec.l #1,er5
50- bne 1b
51-
52- mov.l #_run_stack,sp
53- mov.l sp,er0
54- jsr @board_init_f_mem
55- mov.l er0,sp
56- sub.l er0,er0 /* boot flags */
57- jsr @board_init_f
58- bra .
59-
60-relocate_code:
61- mov.l er1,er0
62- sub.l er1,er1
63- jmp @board_init_r
64-
65- .end
--- a/cpu/h8300h/watchdog.c
+++ /dev/null
@@ -1,32 +0,0 @@
1-/*
2- * Copyright (C) 2010 Yoshinori Sato <ysato@users.sourceforge.jp>
3- *
4- * This program is free software; you can redistribute it and/or
5- * modify it under the terms of the GNU General Public License as
6- * published by the Free Software Foundation; either version 2 of
7- * the License, or (at your option) any later version.
8- *
9- * This program is distributed in the hope that it will be useful,
10- * but WITHOUT ANY WARRANTY; without even the implied warranty of
11- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12- * GNU General Public License for more details.
13- *
14- * You should have received a copy of the GNU General Public License
15- * along with this program; if not, write to the Free Software
16- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
17- * MA 02111-1307 USA
18- */
19-
20-#include <common.h>
21-#include <asm/processor.h>
22-
23-int watchdog_init(void)
24-{
25- return 0;
26-}
27-
28-void reset_cpu(unsigned long ignored)
29-{
30- while (1)
31- ;
32-}
--- a/drivers/core/device.c
+++ b/drivers/core/device.c
@@ -294,7 +294,7 @@ static void *alloc_priv(int size, uint flags)
294294 * TODO(sjg@chromium.org): Drop this microblaze
295295 * exception.
296296 */
297-#ifndef CONFIG_MICROBLAZE
297+#if !defined(CONFIG_MICROBLAZE) && !defined(CONFIG_H8300)
298298 flush_dcache_range((ulong)priv, (ulong)priv + size);
299299 #endif
300300 }
--- a/drivers/i2c/mxc_i2c.c
+++ b/drivers/i2c/mxc_i2c.c
@@ -645,19 +645,6 @@ static int bus_i2c_write(struct mxc_i2c_bus *i2c_bus, u8 chip, u32 addr,
645645 return ret;
646646 }
647647
648-static struct mxc_i2c_bus mxc_i2c_buses[] = {
649-
650- ret = i2c_init_transfer(i2c_bus, chip, addr, alen);
651- if (ret < 0)
652- return ret;
653-
654- ret = i2c_write_data(i2c_bus, chip, buf, len);
655-
656- i2c_imx_stop(i2c_bus);
657-
658- return ret;
659-}
660-
661648 #if !defined(I2C2_BASE_ADDR)
662649 #define I2C2_BASE_ADDR 0
663650 #endif
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -656,7 +656,7 @@ config SANDBOX_SERIAL
656656
657657 config SCIF_CONSOLE
658658 bool "Renesas SCIF UART support"
659- depends on SH || ARCH_RMOBILE
659+ depends on SH || ARCH_RMOBILE || H8300
660660 help
661661 Select this to enable Renesas SCIF UART. To operate serial ports
662662 on systems with RCar or SH SoCs, say Y to this option. If unsure,
--- a/drivers/serial/serial_sh.c
+++ b/drivers/serial/serial_sh.c
@@ -36,7 +36,7 @@ static int scif_rxfill(struct uart_port *port)
3636 return sci_in(port, SCFDR) & SCIF2_RFDC_MASK;
3737 }
3838 }
39-#elif defined(CONFIG_SCI)
39+#elif defined(CONFIG_H8300)
4040 static int scif_rxfill(struct uart_port *port)
4141 {
4242 return (sci_in(port, SCxSR) & SCxSR_RDxF(port))?1:0;
--- a/drivers/serial/serial_sh.h
+++ b/drivers/serial/serial_sh.h
@@ -56,20 +56,6 @@ struct uart_port {
5656 # define SCSPTR5 0xFFE45020
5757 # define SCIF_ORER 0x0001 /* overrun error bit */
5858 # define SCSCR_INIT(port) 0x0038 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */
59-#elif defined(CONFIG_CPU_H83007) || \
60- defined(CONFIG_CPU_H83068) || \
61- defined(CONFIG_CPU_H83069)
62-# define SCSCR_INIT(port) 0x30 /* TIE=0,RIE=0,TE=1,RE=1 */
63-# define H8300_SCI_DR(ch) (*(volatile char *)(P1DR + h8300_sci_pins[ch].port))
64-# define SCIF0_BASE 0xffffb0
65-# define SCIF1_BASE 0xffffb8
66-# define SCIF2_BASE 0xffffc0
67-#elif defined(CONFIG_CPU_H8S2678)
68-# define SCSCR_INIT(port) 0x30 /* TIE=0,RIE=0,TE=1,RE=1 */
69-# define H8300_SCI_DR(ch) (*(volatile char *)(P1DR + h8300_sci_pins[ch].port))
70-# define SCIF0_BASE 0xffff78
71-# define SCIF1_BASE 0xffff80
72-# define SCIF2_BASE 0xffff88
7359 #elif defined(CONFIG_CPU_SH7757) || \
7460 defined(CONFIG_CPU_SH7752) || \
7561 defined(CONFIG_CPU_SH7753)
@@ -113,6 +99,8 @@ struct uart_port {
11399 # endif
114100 # define SCSCR_INIT(port) (port->clk_mode == EXT_CLK ? 0x32 : 0x30)
115101 /* TIE=0,RIE=0,TE=1,RE=1,REIE=0, */
102+#elif defined(CONFIG_H8300)
103+# define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */
116104 #else
117105 # error CPU subtype not defined
118106 #endif
@@ -183,6 +171,10 @@ struct uart_port {
183171 # else
184172 # define SCIF_RFDC_MASK 0x001f
185173 # endif
174+#elif defined(CONFIG_H8300)
175+# define SCIF_ERRORS (SCI_ORER | SCI_FER | SCI_PER)
176+# define SCIF_RFDC_MASK 0x00
177+# define SCIF_TXROOM_MAX 1
186178 #else
187179 # define SCIF_ERRORS (SCIF_PER | SCIF_FER | SCIF_ER | SCIF_BRK)
188180 # define SCIF_RFDC_MASK 0x001f
@@ -194,7 +186,7 @@ struct uart_port {
194186 #endif
195187
196188 #define SCxSR_TEND(port)\
197- (((port)->type == PORT_SCI) ? SCI_TDRE : SCIF_TEND)
189+ (((port)->type == PORT_SCI) ? SCI_TEND : SCIF_TEND)
198190 #define SCxSR_ERRORS(port)\
199191 (((port)->type == PORT_SCI) ? SCI_ERRORS : SCIF_ERRORS)
200192 #define SCxSR_RDxF(port)\
@@ -274,16 +266,6 @@ static inline void sci_##name##_out(struct uart_port *port,\
274266 }\
275267 }
276268
277-#if defiend(CONFIG_H8300)
278-/* h8300 don't have SCIF */
279-#define CPU_SCIF_FNS(name, scif_offset, scif_size) \
280- static inline unsigned int sci_##name##_in(struct uart_port *port) {\
281- return 0;\
282- }\
283- static inline void sci_##name##_out(struct uart_port *port,\
284- unsigned int value) {\
285- }
286-#else
287269 #define CPU_SCIF_FNS(name, scif_offset, scif_size) \
288270 static inline unsigned int sci_##name##_in(struct uart_port *port) {\
289271 SCI_IN(scif_size, scif_offset);\
@@ -327,6 +309,13 @@ static inline void sci_##name##_out(struct uart_port *port,\
327309 sh4_scif_offset, sh4_scif_size) \
328310 CPU_SCIF_FNS(name, sh3_scif_offset, sh3_scif_size)
329311 #endif
312+#elif defined(CONFIG_CPU_SH7723)
313+ #define SCIx_FNS(name, sh4_scifa_offset, sh4_scifa_size,\
314+ sh4_scif_offset, sh4_scif_size) \
315+ CPU_SCIx_FNS(name, sh4_scifa_offset, sh4_scifa_size,\
316+ sh4_scif_offset, sh4_scif_size)
317+ #define SCIF_FNS(name, sh4_scif_offset, sh4_scif_size) \
318+ CPU_SCIF_FNS(name, sh4_scif_offset, sh4_scif_size)
330319 #elif defined(CONFIG_H8300) || defined(CONFIG_RX)
331320 #define SCIx_FNS(name, sh3_sci_offset, sh3_sci_size,\
332321 sh4_sci_offset, sh4_sci_size, \
@@ -334,16 +323,9 @@ static inline void sci_##name##_out(struct uart_port *port,\
334323 sh4_scif_offset, sh4_scif_size, \
335324 h8_sci_offset, h8_sci_size) \
336325 CPU_SCI_FNS(name, h8_sci_offset, h8_sci_size)
337-#define SCIF_FNS(name, sh3_scif_offset, sh3_scif_size,\
326+#define SCIF_FNS(name, sh3_scif_offset, sh3_scif_size, \
338327 sh4_scif_offset, sh4_scif_size) \
339328 CPU_SCIF_FNS(name, 0, 0)
340-#elif defined(CONFIG_CPU_SH7723)
341- #define SCIx_FNS(name, sh4_scifa_offset, sh4_scifa_size,\
342- sh4_scif_offset, sh4_scif_size) \
343- CPU_SCIx_FNS(name, sh4_scifa_offset, sh4_scifa_size,\
344- sh4_scif_offset, sh4_scif_size)
345- #define SCIF_FNS(name, sh4_scif_offset, sh4_scif_size) \
346- CPU_SCIF_FNS(name, sh4_scif_offset, sh4_scif_size)
347329 #else
348330 #define SCIx_FNS(name, sh3_sci_offset, sh3_sci_size,\
349331 sh4_sci_offset, sh4_sci_size, \
@@ -458,59 +440,7 @@ SCIF_FNS(DL, 0, 0, 0x0, 0) /* dummy */
458440 #define sci_in(port, reg) sci_##reg##_in(port)
459441 #define sci_out(port, reg, value) sci_##reg##_out(port, value)
460442
461-/* H8/300 series SCI pins assignment */
462-#if defined(CONFIG_H8300)
463-static const struct __attribute__((packed)) {
464- int port; /* GPIO port no */
465- unsigned short rx, tx; /* GPIO bit no */
466-} h8300_sci_pins[] = {
467-#if defined(CONFIG_CPU_H83007) || defined(CONFIG_CPU_H83068)
468- { /* SCI0 */
469- .port = H8300_GPIO_P9,
470- .rx = H8300_GPIO_B2,
471- .tx = H8300_GPIO_B0,
472- },
473- { /* SCI1 */
474- .port = H8300_GPIO_P9,
475- .rx = H8300_GPIO_B3,
476- .tx = H8300_GPIO_B1,
477- },
478- { /* SCI2 */
479- .port = H8300_GPIO_PB,
480- .rx = H8300_GPIO_B7,
481- .tx = H8300_GPIO_B6,
482- }
483-#elif defined(CONFIG_H8S2678)
484- { /* SCI0 */
485- .port = H8300_GPIO_P3,
486- .rx = H8300_GPIO_B2,
487- .tx = H8300_GPIO_B0,
488- },
489- { /* SCI1 */
490- .port = H8300_GPIO_P3,
491- .rx = H8300_GPIO_B3,
492- .tx = H8300_GPIO_B1,
493- },
494- { /* SCI2 */
495- .port = H8300_GPIO_P5,
496- .rx = H8300_GPIO_B1,
497- .tx = H8300_GPIO_B0,
498- }
499-#endif
500-};
501-#endif
502-
503-#if defined(CONFIG_CPU_SH7706) || \
504- defined(CONFIG_CPU_SH7707) || \
505- defined(CONFIG_CPU_SH7708) || \
506- defined(CONFIG_CPU_SH7709)
507-static inline int sci_rxd_in(struct uart_port *port)
508-{
509- if (port->mapbase == 0xfffffe80)
510- return __raw_readb(SCPDR)&0x01 ? 1 : 0; /* SCI */
511- return 1;
512-}
513-#elif defined(CONFIG_CPU_SH7750) || \
443+#if defined(CONFIG_CPU_SH7750) || \
514444 defined(CONFIG_CPU_SH7751) || \
515445 defined(CONFIG_CPU_SH7751R) || \
516446 defined(CONFIG_CPU_SH7750R) || \
@@ -521,11 +451,6 @@ static inline int sci_rxd_in(struct uart_port *port)
521451 return __raw_readb(SCSPTR1)&0x01 ? 1 : 0; /* SCI */
522452 return 1;
523453 }
524-#elif defined(CONFIG_H8300)
525-static inline int sci_rxd_in(struct uart_port *port)
526-{
527- return 1;
528-}
529454 #else /* default case for non-SCI processors */
530455 static inline int sci_rxd_in(struct uart_port *port)
531456 {
--- a/include/configs/kanebebe.h
+++ b/include/configs/kanebebe.h
@@ -25,15 +25,10 @@
2525 #ifndef __KANEBEBE_H
2626 #define __KANEBEBE_H
2727
28-#define CONFIG_CPU_H83069 1
29-#define CONFIG_H8300_RELOCATE 0
30-
3128 /*#define CONFIG_SYS_LDSCRIPT "board/nisshin-tech/kanebebe/u-boot.lds.ram"*/
3229
33-#define CONFIG_BAUDRATE 38400
3430 #define CONFIG_BOOTARGS "earlyprintk=sh-sci.1,38400 console=ttySC1,38400"
3531 #define CONFIG_BOARD_LATE_INIT
36-#define CONFIG_SYS_TEXT_BASE 0x008000
3732 #define CONFIG_SYS_MONITOR_BASE 0x7b0000
3833 #define CONFIG_BOARD_EARLY_INIT_F
3934 #undef CONFIG_VERSION_VARIABLE
@@ -42,7 +37,6 @@
4237 /* MEMORY */
4338 #define KANEBEBE_DRAM_BASE 0x400000
4439
45-#define CONFIG_SYS_LONGHELP /* undef to save memory */
4640 #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
4741 #define CONFIG_SYS_CBSIZE 256 /* Buffer size for input from the Console */
4842 #define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */
@@ -52,17 +46,12 @@
5246 /* List of legal baudrate settings for this board */
5347 #define CONFIG_SYS_BAUDRATE_TABLE { 38400 }
5448 #define CONFIG_DOS_PARTITION
55-#define CONFIG_OF_LIBFDT
5649 #define CONFIG_LMB
5750
5851 /* SCI */
59-#define CONFIG_SCI 1
6052 #define CONFIG_SCIF_CONSOLE 1
6153 #define CONFIG_CONS_SCIF1 1
6254
63-/* TIMER */
64-#define CONFIG_TIMER_BASE 0xffff80 /* CH0-1 */
65-
6655 #define CONFIG_SYS_MEMTEST_START KANEBEBE_DRAM_BASE
6756 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (3 * 1024 * 1024))
6857
@@ -86,19 +75,12 @@
8675
8776 #define CONFIG_SYS_RX_ETH_BUFFER 1
8877
89-#define CONFIG_SYS_NO_FLASH 1
9078 /*#define CONFIG_HAS_DATAFLASH 1*/
9179
9280 /* Board Clock */
9381 #define CONFIG_SYS_CLK_FREQ 25000000
9482 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
9583
96-/* GPIO */
97-#define CONFIG_H8300_GPIO \
98- {0x00,0x00,0x00,0x00,0xff,0x0f,0x87,0xff,0x00,0xff,0xef}
99-#define CONFIG_H8300_INIT_DDR \
100- {0xff,0xff,0x00,0x00,0x01,0x00,0x00,0x0e,0x00,0xff,0x00}
101-
10284 #ifdef CONFIG_NET
10385 #define CONFIG_DRIVER_NE2000 1
10486 #define CONFIG_DRIVER_NE2000_BASE 0x200000
--- a/include/image.h
+++ b/include/image.h
@@ -195,7 +195,7 @@ enum {
195195 IH_ARCH_X86_64, /* AMD x86_64, Intel and Via */
196196 IH_ARCH_XTENSA, /* Xtensa */
197197 IH_ARCH_RISCV, /* RISC-V */
198-
198+ IH_ARCH_H8300, /* H8/300 */
199199 IH_ARCH_COUNT,
200200 };
201201