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ef8f948 landisk 2016-03-23 02:49:56 Yoshinori Sato

sh: landisk support update.

Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>

08b81b1 2016-03-23 02:49:29 Yoshinori Sato

pci: SH address space fix.

Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>

6e303a5 2016-03-23 02:49:29 Yoshinori Sato

SPL: CONFIG_SPL_SERIAL_SUPPORT disabled fix.

Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>

9889ce9 2016-03-23 02:49:29 Yoshinori Sato

spl: CONFIG_SPL_FAT_SUPPORT doesn't work

Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>

484715e 2016-03-23 02:49:17 Yoshinori Sato

spl: Add IDE support.

Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>

5febb26 2016-03-23 02:32:52 Yoshinori Sato

Add missing driver name.

Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>

49124cc 2016-03-21 03:40:45 Yoshinori Sato

Merge remote-tracking branch 'origin' into landisk

6230894 2016-03-20 23:10:30 Yoshinori Sato

spl: disable serial output for !CONFIG_SPL_SERIAL

38d8c97 2016-03-20 23:10:30 Yoshinori Sato

sh: correct isa type

Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>

f45c1a3 2016-03-20 23:10:29 Yoshinori Sato

ide: fix build error

Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>

e3a8b73 2016-03-20 23:10:29 Yoshinori Sato

pci: SH4 28bit address support

4fd4688 2016-03-20 23:10:22 Yoshinori Sato

SPL: PCI / IDE support

Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>

c902e7d 2016-03-20 23:10:22 Yoshinori Sato

sh: SPL support.

Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>

c1ca2d3 2016-03-20 23:10:22 Yoshinori Sato

remove missing IDE initialize

5083d8a 2016-03-20 23:10:13 Yoshinori Sato

sh: Add LANDISK target support

Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>

e4fb863 2016-03-18 12:27:39 Simon Glass

dm: blk: Add tests for block devices

Add some tests to check that block devices work as expected.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Stephen Warren <swarren@nvidia.com>

33cf727 2016-03-18 12:27:39 Simon Glass

dm: sandbox: Drop the pre-DM host implementation

Driver model is used for host device block devices now, so we don't need the
old code. Remove it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Stephen Warren <swarren@nvidia.com>

8b726dc 2016-03-18 12:27:39 Simon Glass

dm: sandbox: Switch over to use DM for block devices

Now that the drivers used by sandbox support CONFIG_BLK, we can switch
sandbox over to use driver model for block devices.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Stephen Warren <swarren@nvidia.com>

9b97756 2016-03-18 12:27:39 Simon Glass

dm: usb: Unbind old block devices when shutting down USB

When 'usb start' is used, block devices are created for any USB flash sticks
and disks, etc. When 'usb stop' is used, these block devices are currently
not removed.

We don't want old block devices hanging around since they can still be
visible to U-Boot. Therefore, when USB is shut down, remove and unbind all
the block devices created by the USB subsystem.

Possibly we should unbind all devices which don't cause problems by being
unbound. Most likely we can remove everything except USB controllers, hubs
and emulators. We can consider that later.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Stephen Warren <swarren@nvidia.com>

c81d0d2 2016-03-18 12:27:39 Simon Glass

buildman: Clarify the use of -V

This option outputs to the log file, not to the terminal. Clarify that in
the help, and add a mention of it in the README.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Stephen Warren <swarren@wwwdotorg.org>
Reviewed-by: Stephen Warren <swarren@nvidia.com>

17bce66 2016-03-18 12:27:39 Simon Glass

buildman: Add a way to specific a full toolchain prefix

At present buildman allows you to specify the directory containing the
toolchain, but not the actual toolchain prefix. If there are multiple
toolchains in a single directory, this can be inconvenient.

Add a new 'toolchain-prefix' setting to the settings file, which allows
the full prefix (or path to the C compiler) to be specified.

Update the documentation to match.

Suggested-by: Stephen Warren <swarren@wwwdotorg.org>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Stephen Warren <swarren@nvidia.com>

d4c8572 2016-03-18 12:27:39 Simon Glass

buildman: Allow branch names which conflict with directories

At present if you try to use buildman with the branch 'test' it will
complain that it is unsure whether you mean the branch or the directory.
This is a feature of the 'git log' command that buildman uses. Fix it
by resolving the ambiguity.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>

59b35dd 2016-03-18 12:27:39 Michal Simek

dm: ns16550: Add support for reg-offset property

reg-offset is the part of standard 8250 binding in the kernel.
It is shifting start of address space by reg-offset.
On Xilinx platform this offset is typically 0x1000.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Moved the new field to the end of the struct to avoid problems:
Signed-off-by: Simon Glass <sjg@chromium.org>

4428f3c 2016-03-18 12:27:39 Przemyslaw Marczak

Revert "fdt: fix address cell count checking in fdt_translate_address()"

This reverts commit 71105f50fedddfa5b0535d102c3d5078671721ad.

The reverted commit was applied for a temporary to unbreak
few Exynos boards on the release.

After the discussion about the change, this commit should be avoided.
Fixed device-tree for Exynos, allows reverting it without any issues.

Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Tested-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>

3349682 2016-03-18 12:27:39 Przemyslaw Marczak

dts:exynos:update pinctrl size-cells and fix child regs

This change is required to avoid warnings about invalid
size-cells defined in device-tree pinctrl nodes for Exynos.

Tested on:
- Odroid U3
- Odroid XU3

Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Tested-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Minkyu Kang <mk7.kang@samsung.com>

b71bea7 2016-03-18 12:27:37 Simon Glass

gpio: Report errors when GPIOs cannot be read

Some controllers do not allow the output value to be read. Detect this and
report the error in that case.

Signed-off-by: Simon Glass <sjg@chromium.org>

f23baa5 2016-03-17 23:14:25 Tom Rini

cmd_dhry.c: Use lldiv for vax_mips calculation as well

Since dhry_per_sec is a u64 we must also use lldiv here when working
with it. Otherwise:
../lib/dhry/cmd_dhry.c:(.text.do_dhry+0xd8): undefined reference to `__udivdi3'

On some platforms.

Signed-off-by: Tom Rini <trini@konsulko.com>

82ceba2 2016-03-17 11:27:27 Stefan Roese

x86: Add congatec conga-QA3/E3845-4G (Bay Trail) support

This patch adds support for the congatec conga-QA3/E3845-4G eMMC8 SoM,
installed on the congatec Qseven 2.0 evaluation carrier board
(conga-QEVAL).

Its port is very similar to the MinnowboardMAX port and also uses
the Intel FSP as described in doc/README.x86.

Currently supported are the following interfaces / devices:
- UART (via Winbond legacy SuperIO chip on carrier board)
- Ethernet (PCIe Intel I210 / E1000)
- SPI including SPI NOR as boot-device
- USB 2.0
- SATA via U-Boot SCSI IF
- eMMC
- Video (HDMI output @ 800x600)
- PCIe

Not supported yet is:
- I2C
- USB 3.0

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

374e78e 2016-03-17 11:27:27 Simon Glass

x86: Add support for the samus chromebook

This adds basic support for chromebook_samus. This is the 2015 Pixel and
is based on an Intel broadwell platform.

Supported so far are:
- Serial
- SPI flash
- SDRAM init (with MRC cache)
- SATA
- Video (on the internal LCD panel)
- Keyboard

Various less-visible drivers are provided to make the above work (e.g. PCH,
power control and LPC).

The platform requires various binary blobs which are documented in the
README. The major missing feature is USB3 since the existing U-Boot support
does not work correctly with Intel XHCI controllers.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

e5aa8a9 2016-03-17 11:27:27 Simon Glass

x86: Support a chained-boot development flow

Sometimes it is useful to jump into U-Boot directly from coreboot or UEFI
without any 16-bit init. This can help during development by allowing U-Boot
to avoid doing all the init required by the platform.

U-Boot expects its GDT to be set up correctly by its 16-bit code. If
coreboot doesn't do this (because it hasn't run the payload setup code yet)
then this won't happen.

In this case we cannot rely on the GDT settings. U-Boot will hang or crash
if these are wrong. Provide a development-only option to set up the GDT
correctly. This is just a hack so you can jump to U-Boot from any stage of
coreboot, not just at the end.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>